Lau, John 3D IC Integration and Packaging

ISBN 13: 9780071848060

3D IC Integration and Packaging

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9780071848060: 3D IC Integration and Packaging

A comprehensive, cutting-edge guide to 3D IC integration and packaging methods and solutions

3D IC Integration and Packaging helps practicing engineers, managers, scientists, and researchers to quickly understand the major topics considered important in this field. You will learn about basic problem-solving methods and understand the trade-offs inherent in making system-level decisions.

Based on a popular short course developed by the author and taught at international conferences, this practical guide addresses new methods required to design and fabricate denser ICs to keep pace with Moore’s Law, and meet demands for increased density, higher bandwidths, and lower power. The use of 3D IC integration as an enabling technology in the development of the next generation of semiconductors is also considered. This is a definitive, comprehensive reference on the current state of knowledge of these key enabling technologies.

  • Provides innovative and timely information all aspects of 3D IC integration and packaging technology
  • Begins with a general description of 3D integration and packaging
  • Moves on to a detailed discussion of TSV, thin-wafer strength measurement and handling, packaging substrate technology, solder microbumping, 3D Si integration, 2.5/3D IC integration, thermal management, applications of 3D IC integration, and 3D IC packaging

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Product Description:

A comprehensive guide to 3D IC integration and packaging methods and solutions, featuring detailed examples and real-world applications

Semiconductor manufacturers are continuously seeking new paths to design and fabricate ICs with increased density, higher bandwidth, and lower power. Many design teams are now looking to 3D IC integration as an enabling technology for the development of the next generation of semiconductors.

Based on a popular course developed by its author, 3D IC Integration and Packaging is written so that you can quickly acquire problem-solving skills and understand the trade-offs inherent in making system-level decisions.

  • Provides cutting-edge, timely information on all aspects of 3D IC integration and packaging
  • Advanced topics include TSV, thin-wafer handling, thermal management, and solder microbumping
  • Practical applications of 3D IC technology are covered in full detail
  • Author has written 16 engineering books and published more than 350 peer-reviewed papers

About the Author:

John H. Lau received his Ph.D. degree in Theoretical and Applied Mechanics from the University of Illinois (1977), a M.A.Sc. degree in Structural Engineering from the University of British Columbia (1973), a second M.S. degree in Engineering Physics from the University of Wisconsin (1974), and a third M.S. degree in Management Science from Fairleigh Dickinson University (1981). He also has a B.E. degree in Civil Engineering from National Taiwan University (1970). John is an interconnection technology scientist at Agilent Technologies, Inc. His current interests cover a broad range of electronic and optoelectronic packaging and manufacturing technology. Prior to Agilent, he worked for Express Packaging Systems, Hewlett-Packard Company, Sandia National Laboratory, Bechtel Power Corporation, and Exxon Production and Research Company. With more than 30 years of R&D and manufacturing experience in the electronics, petroleum, nuclear, and defense industries, he has given over 200 workshops, authored and co-authored over 180 peer reviewed technical publications, and is the author and editor of 13 books: Solder Joint Reliability; Handbook of Tape Automated Bonding; Thermal Stress and Strain in Microelectronics Packaging; The Mechanics of Solder Alloy Interconnects; Handbook of Fine Pitch Surface Mount Technology; Chip On Board Technologies for Multichip Modules; Ball Grid Array Technology; Flip Chip Technologies; Solder Joint Reliability of BGA, CSP, Flip Chip, and Fine Pitch SMT Assemblies; Electronics Packaging: Design, Materials, Process, and Reliability; Chip Scale Package (CSP): Design, Materials, Process, Reliability, and Applications; Low Cost Flip Chip Technologies for DCA, WLCSP, and PBGA Assemblies, and Microvias for Low Cost, High Density Interconnects. John served as one of the associate editors of the IEEE Transactions on Components, Packaging, and Manufacturing Technology and ASME Transactions, Journal of Electronic Packaging. He also served as general chairman, program chairman, and session chairman, and invited speaker of several IEEE, ASME, ASM, MRS, IMAPS, SEMI, and SMI International conferences. He received a few awards from ASME and IEEE for best papers and outstanding technical achievements, and is an ASME Fellow and an IEEE Fellow. He is listed in American Men and Women of Science and Who's Who in America.

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