Computer Architecture

 
9780198084075: Computer Architecture

About the Book: Computer Architecture The book emphasizes both underlying theory and actual designs,and covers a wide array of topics and links computer architectureto other subfields of computing. Computer Architecture: From Microprocessors to Supercomputersprovides a comprehensive introduction to this thriving and excitingfield. Emphasizing both underlying theory and actual designs, thebook covers a wide array of topics and links computer architectureto other subfields of computing. The material is presented inlecture-sized chapters that make it easy for students to understandthe relationships between various topics and to see the ybigpicture. The short chapters also allow instructors to order topicsin the course as they like. The text is divided into seven parts,each containing four chapters. Part I provides context and reviewsprerequisite topics including digital computer technology andcomputer system performance. Part II discusses instruction-setarchitecture. The next two parts cover the central processing unit.Part III describes the structure of arithmetic/logic units and PartIV is devoted to data path and control circuits. Part V deals withthe memory system. Part VI covers input/output and interfacingtopics and Part VII introduces advanced architectures. Contents Preface PART 1: Background And Motivation 1. Combinational Digital Circuits 2. Digital Circuits with Memory 3. Computer System Technology 4. Computer Performance PART 2: Instruction-Set Architecture 5. Instructions and Addressing 6. Procedures and Data 7. Assembly Language Programs 8. Instruction-Set Variations PART 3: The Arithmetic/Logic Unit 9. Number Representation 10. Adders and Simple ALUs 11. Multipliers and Dividers 12. Floating-Point Arithmetic PART 4: Data Path And Control 13. Instruction Execution Steps 14. Control Unit Synthesis 15. Pipelined Data Paths 16. Pipeline Performance Limits PART 5: Memory System Design 17. Main Memory Concepts 18. Cache Memory Organization 19. Mass Memory Con

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Book Description Oxford University Press, 2014. Softcover. Book Condition: New. 5th or later edition. Table of Contents Preface PART 1: BACKGROUND AND MOTIVATION 1. Combinational Digital Circuits 2. Digital Circuits with Memory 3. Computer System Technology 4. Computer Performance PART 2: INSTRUCTION-SET ARCHITECTURE 5. Instructions and Addressing 6. Procedures and Data 7. Assembly Language Programs 8. Instruction-Set Variations PART 3: THE ARITHMETIC/LOGIC UNIT 9. Number Representation 10. Adders and Simple ALUs 11. Multipliers and Dividers 12. Floating-Point Arithmetic PART 4: DATA PATH AND CONTROL 13. Instruction Execution Steps 14. Control Unit Synthesis 15. Pipelined Data Paths 16. Pipeline Performance Limits PART 5: MEMORY SYSTEM DESIGN 17. Main Memory Concepts 18. Cache Memory Organization 19. Mass Memory Concepts 20. Virtual Memory and Paging PART 6: INPUT/OUTPUT AND INTERFACING 21. Input/Output Devices 22. Input/Output Programming 23. Buses, Links, and Interfacing 24. Context Switching and Interrupts PART 7: ADVANCED ARCHITECTURES 25. Road to Higher Performance 26. Vector and Array Processing 27. Shared-Memory Multiprocessing 28. Distributed Multicomputing Index Printed Pages: 556. Bookseller Inventory # 97465

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Book Description Oxford University Press, 2014. Softcover. Book Condition: New. 5th or later edition. Table of Contents Preface PART 1: BACKGROUND AND MOTIVATION 1. Combinational Digital Circuits 2. Digital Circuits with Memory 3. Computer System Technology 4. Computer Performance PART 2: INSTRUCTION-SET ARCHITECTURE 5. Instructions and Addressing 6. Procedures and Data 7. Assembly Language Programs 8. Instruction-Set Variations PART 3: THE ARITHMETIC/LOGIC UNIT 9. Number Representation 10. Adders and Simple ALUs 11. Multipliers and Dividers 12. Floating-Point Arithmetic PART 4: DATA PATH AND CONTROL 13. Instruction Execution Steps 14. Control Unit Synthesis 15. Pipelined Data Paths 16. Pipeline Performance Limits PART 5: MEMORY SYSTEM DESIGN 17. Main Memory Concepts 18. Cache Memory Organization 19. Mass Memory Concepts 20. Virtual Memory and Paging PART 6: INPUT/OUTPUT AND INTERFACING 21. Input/Output Devices 22. Input/Output Programming 23. Buses, Links, and Interfacing 24. Context Switching and Interrupts PART 7: ADVANCED ARCHITECTURES 25. Road to Higher Performance 26. Vector and Array Processing 27. Shared-Memory Multiprocessing 28. Distributed Multicomputing Index Printed Pages: 556. Bookseller Inventory # 97465

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