ESD in Silicon Integrated Circuits

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9780471498711: ESD in Silicon Integrated Circuits

* Examines the various methods available for circuit protection, including coverage of the newly developed ESD circuit protection schemes for VLSI circuits.
* Provides guidance on the implementation of circuit protection measures.
* Includes new sections on ESD design rules, layout approaches, package effects, and circuit concepts.
* Reviews the new Charged Device Model (CDM) test method and evaluates design requirements necessary for circuit protection.

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From the Publisher:

This comprehensive reference explains the practical aspects of electrostatic discharge (ESD) and its implications in the design and development of new technologies and integrated circuits. Emphasizes the key issues of reliability and test methods to evaluate protection circuit performance. Various case studies illustrate the effects of diverse design approaches and the full effectiveness of a protection circuit is realized through stress analysis. Concludes with a summary of cutting-edge techniques and prospective future developments.

From the Back Cover:

As high density circuits move deeper into submicron dimensions Electrostatic Discharge (ESD) effects become an increasing concern. This new edition of a classic reference presents a practical and systematic approach to ESD device physics, modelling and design techniques. The authors draw upon their wealth of industrial experience to provide a complete overview of ESD and its implications in the development of advanced integrated circuits.

Fully revised to incorporate the latest industry achievements and featuring:
* Design methods for a variety of technologies from 1 micron to the current sub-micron regimes, along with complete design approaches for MOS, BiCMOS and Power MOSFETs.

* New sections on ESD design rules, process technology effects, layout approaches, package effects and circuit simulations.

* Guidance on the implementation of circuit protection measures for a range of I/O configurations.

* Detailed coverage of ESD simulation stress models.
This unique reference provides the means to design protection circuits for a variety of applications and to diagnose and solve ESD problems in IC products. The coverage of state-of-the-art circuit design for ESD prevention will appeal to engineers and scientists working in the fields of IC and transistor design. Graduate students and researchers in device/circuit modeling and semiconductor reliability will appreciate this comprehensive coverage of ESD fundamentals.

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