Design and Test Techniques for Vlsi and Wsi Circuits (Computing Series No 15)

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9780863411656: Design and Test Techniques for Vlsi and Wsi Circuits (Computing Series No 15)

This book provides an up-to-date view of VLSI and WSI design and test methodologies, combining an introduction to the topics covered with an indication of current research directions and results. The coverage is thus suitable for undergraduates studying microelectronic systems design, for postgraduate researchers and for graduate engineers and managers seeking an overview or introduction to semi- and full-custom large-scale chip design. The contributions have been carefully chosen to take the reader from an introductory treatment of the gate array design route, very typically favoured by new entrants into the business of custom chip design, through a study of more ambitious design tools that allow the user to progress naturally to full-custom design. Having establihsed the style of design tools that are either in current use, or which are likely to set the future style of chip design packages, the book moves on to review the related fields of design-for-testability and fault tolerant VLSI design. The final section of the book deals with the concept of Wafer Scale Integration - WSI - which offers very exciting opportunities for devices of large system-scale complexities.

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Massara, R.E. (Ed.)
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Book Description Peter Peregrinus Ltd on Behalf of the Institution of Electrical Engineers, London, 1989. Hardcover. Book Condition: Good. Dust Jacket Condition: Good. IEE Computing Series 15. HARDCOVER WITH DUST JACKET, 315 pages, all clean and in nice condition, light use and a little light shelf wear. Size: 8vo - over 7¾" - 9¾" tall. Bookseller Inventory # 005113

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Book Description Peter Peregrinus on Behalf of the Institution of Electrical Engineers (IEE), 1989. Hardcover. Book Condition: Near Fine. Dust Jacket Condition: Near Fine. First Edition First Printing. NO CHIPPING & NO SPLITTING to CLEAN boards. Internally CLEAN. Tiny neat ink name & date stamp to front blank endpaper. Endpapers ORIGINGAL & UNSPLIT. TIGHT textblock. NO LOOSE & NO MISSING leaves. The dustwrapper is COMPLETE with NO LOSS. Lightest wear only to extremities & very mild lightening to spine. NOT PRICE CLIPPED. Bookseller Inventory # 13100

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Book Description Peter Peregrinus Ltd, London, 1989. Hard Cover. First Edition. Hard cloth covers, ex college library copy with internal labels and stamp, no pocket, otherwise a fine copy, pp vi,315. Text illustrations, tables and diagrams throughout. Published on behalf of the Institution of Electrical Engineers. Size: 15x23cm. Bookseller Inventory # 005156

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