Here's the Fourth Edition of the world-wide industry standard for the PCI bus! This book actually goes beyond the PCI 2.2 specification and includes expanded coverage of bridges. Written by two of the PCI architects, and reviewed by Norm Rasmussen and Brad Hosler (two of the primary architects), this book is an absolute must if you plan to use PCI in any of your designs.
This book covers both the hardware and software aspects of the PCI Local Bus. Free from the space limitations of a formal specification, they have gone beyond the PCI Local Bus Specification to describe conditions that you likely will meet in your day-to-day design and programming tasks. PCI Hardware and Software provides a complete PCI overview, including its relationship to the ISA bus and the Plug and Play architecture.
Considerable space is given to the signal line definitions and the functional interaction between PCI resources. Bus cycle operations, including interactions between bus masters and targets of various data widths are covered in detail. These cycles and protocols are illustrated by numerous detailed timing diagrams.
Because of the impact cache memory has on system speed, an entire chapter is devoted to PCI cache support. Termination and bus ownership issues are also thoroughly covered. Software issues, such as use of the PCI Configuration Address Space, are described in detail, as are Bridges, and their use between similar and different buses.
This is the reference that is used by the PCI architects themselves. It is truly the design standard for the world. No one should venture into PCI territory without it!
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In order to assist engineers to quickly grasp the basic concepts of PCI and PCI-X, a CD-ROM is included with the book. The CD-ROM contains full color tutorials from public seminars provided over the years. These tutorials do not have to be reviewed prior to reading the book or specifications.
Edward Solari, while at the Intel Architecture Labs, worked closely with the PCI Special Interest Group and was involved in the development of PCI chip sets, AT compatible platform designs, and telephony projects. Before retiring from Intel, he worked on the Merced chip set. George Willse, also from the Intel Architecture Labs, was the Senior BIOS Engineer for the first PCI-based system BIOS. He has worked on Advanced Plug and Play BIOS development, and is presently a senior engineer working on advanced platform processes and development.
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