The dramatic increase in computer performance has been extraordinary, but not for all computations: it has key limits and structure. Software architects, developers, and even data scientists need to understand how exploit the fundamental structure of computer performance to harness it for future applications. Ideal for upper level undergraduates, Computer Architecture for Scientists covers four key pillars of computer performance and imparts a high-level basis for reasoning with and understanding these concepts: Small is fast – how size scaling drives performance; Implicit parallelism – how a sequential program can be executed faster with parallelism; Dynamic locality – skirting physical limits, by arranging data in a smaller space; Parallelism – increasing performance with teams of workers. These principles and models provide approachable high-level insights and quantitative modelling without distracting low-level detail. Finally, the text covers the GPU and machine-learning accelerators that have become increasingly important for mainstream applications.
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Andrew A. Chien is William Eckhardt Professor at the University of Chicago, Director of the CERES Center for Unstoppable Computing, and a Senior Scientist at Argonne National Laboratory. Since 2017, he has served as Editor-in-Chief of the Communications of the ACM. He is currently a member of the National Science Foundation's CISE Directorate Advisory Board. Chien is a global research leader in parallel computing, computer architecture, clusters, and cloud computing, and has received numerous awards for his research. In 1994 he was named a National Science Foundation Young Investigator. Dr. Chien served as Vice President of Research at Intel Corporation from 2005-2010, and on advisory boards for the National Science Foundation, Department of Energy, Japan RWCP, and distinguished universities such as Stanford, UC Berkeley, EPFL, and the University of Washington. From 1998-2005, he was SAIC Chair Professor at UCSD, and prior to that, a professor at the University of Illinois. Dr. Chien is a Fellow of the ACM, Fellow of the IEEE, and Fellow of the AAAS, and earned his PhD, MS, and BS from the Massachusetts Institute of Technology.
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Hardcover. Condition: new. Hardcover. The dramatic increase in computer performance has been extraordinary, but not for all computations: it has key limits and structure. Software architects, developers, and even data scientists need to understand how exploit the fundamental structure of computer performance to harness it for future applications. Ideal for upper level undergraduates, Computer Architecture for Scientists covers four key pillars of computer performance and imparts a high-level basis for reasoning with and understanding these concepts: Small is fast how size scaling drives performance; Implicit parallelism how a sequential program can be executed faster with parallelism; Dynamic locality skirting physical limits, by arranging data in a smaller space; Parallelism increasing performance with teams of workers. These principles and models provide approachable high-level insights and quantitative modelling without distracting low-level detail. Finally, the text covers the GPU and machine-learning accelerators that have become increasingly important for mainstream applications. Rapidly growing cadres of sophisticated computing users need to understand how to exploit computing performance and the architecture of computers that give rise to it. With an accessible, principle-based approach, this book offers a high-level view of the four key pillars of performance. Ideal for computer, data, or social scientists and engineers. This item is printed on demand. Shipping may be from multiple locations in the US or from the UK, depending on stock availability. Seller Inventory # 9781316518533
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