Circuit Design for CMOS VLSI

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9781461366096: Circuit Design for CMOS VLSI
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During the last decade, CMOS has become increasingly attractive as a basic integrated circuit technology due to its low power (at moderate frequencies), good scalability, and rail-to-rail operation. There are now a variety of CMOS circuit styles, some based on static complementary con­ ductance properties, but others borrowing from earlier NMOS techniques and the advantages of using clocking disciplines for precharge-evaluate se­ quencing. In this comprehensive book, the reader is led systematically through the entire range of CMOS circuit design. Starting with the in­ dividual MOSFET, basic circuit building blocks are described, leading to a broad view of both combinatorial and sequential circuits. Once these circuits are considered in the light of CMOS process technologies, impor­ tant topics in circuit performance are considered, including characteristics of interconnect, gate delay, device sizing, and I/O buffering. Basic circuits are then composed to form macro elements such as multipliers, where the reader acquires a unified view of architectural performance through par­ allelism, and circuit performance through careful attention to circuit-level and layout design optimization. Topics in analog circuit design reflect the growing tendency for both analog and digital circuit forms to be combined on the same chip, and a careful treatment of BiCMOS forms introduces the reader to the combination of both FET and bipolar technologies on the same chip to provide improved performance.

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John P. Uyemura
Published by Springer-Verlag New York Inc., United States (2011)
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Book Description Springer-Verlag New York Inc., United States, 2011. Paperback. Condition: New. Language: English . Brand New Book. During the last decade, CMOS has become increasingly attractive as a basic integrated circuit technology due to its low power (at moderate frequencies), good scalability, and rail-to-rail operation. There are now a variety of CMOS circuit styles, some based on static complementary con- ductance properties, but others borrowing from earlier NMOS techniques and the advantages of using clocking disciplines for precharge-evaluate se- quencing. In this comprehensive book, the reader is led systematically through the entire range of CMOS circuit design. Starting with the in- dividual MOSFET, basic circuit building blocks are described, leading to a broad view of both combinatorial and sequential circuits. Once these circuits are considered in the light of CMOS process technologies, impor- tant topics in circuit performance are considered, including characteristics of interconnect, gate delay, device sizing, and I/O buffering. Basic circuits are then composed to form macro elements such as multipliers, where the reader acquires a unified view of architectural performance through par- allelism, and circuit performance through careful attention to circuit-level and layout design optimization. Topics in analog circuit design reflect the growing tendency for both analog and digital circuit forms to be combined on the same chip, and a careful treatment of BiCMOS forms introduces the reader to the combination of both FET and bipolar technologies on the same chip to provide improved performance. Softcover reprint of the original 1st ed. 1992. Seller Inventory # KNV9781461366096

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Book Description Springer-Verlag New York Inc., United States, 2011. Paperback. Condition: New. Language: English . Brand New Book. During the last decade, CMOS has become increasingly attractive as a basic integrated circuit technology due to its low power (at moderate frequencies), good scalability, and rail-to-rail operation. There are now a variety of CMOS circuit styles, some based on static complementary con- ductance properties, but others borrowing from earlier NMOS techniques and the advantages of using clocking disciplines for precharge-evaluate se- quencing. In this comprehensive book, the reader is led systematically through the entire range of CMOS circuit design. Starting with the in- dividual MOSFET, basic circuit building blocks are described, leading to a broad view of both combinatorial and sequential circuits. Once these circuits are considered in the light of CMOS process technologies, impor- tant topics in circuit performance are considered, including characteristics of interconnect, gate delay, device sizing, and I/O buffering. Basic circuits are then composed to form macro elements such as multipliers, where the reader acquires a unified view of architectural performance through par- allelism, and circuit performance through careful attention to circuit-level and layout design optimization. Topics in analog circuit design reflect the growing tendency for both analog and digital circuit forms to be combined on the same chip, and a careful treatment of BiCMOS forms introduces the reader to the combination of both FET and bipolar technologies on the same chip to provide improved performance. Softcover reprint of the original 1st ed. 1992. Seller Inventory # KNV9781461366096

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Book Description Springer US 1991-11-30, Berlin, 1991. paperback. Condition: New. Seller Inventory # 9781461366096

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Book Description Condition: New. Publisher/Verlag: Springer, Berlin | During the last decade, CMOS has become increasingly attractive as a basic integrated circuit technology due to its low power (at moderate frequencies), good scalability, and rail-to-rail operation. There are now a variety of CMOS circuit styles, some based on static complementary con ductance properties, but others borrowing from earlier NMOS techniques and the advantages of using clocking disciplines for precharge-evaluate se quencing. In this comprehensive book, the reader is led systematically through the entire range of CMOS circuit design. Starting with the in dividual MOSFET, basic circuit building blocks are described, leading to a broad view of both combinatorial and sequential circuits. Once these circuits are considered in the light of CMOS process technologies, impor tant topics in circuit performance are considered, including characteristics of interconnect, gate delay, device sizing, and I/O buffering. Basic circuits are then composed to form macro elements such as multipliers, where the reader acquires a unified view of architectural performance through par allelism, and circuit performance through careful attention to circuit-level and layout design optimization. Topics in analog circuit design reflect the growing tendency for both analog and digital circuit forms to be combined on the same chip, and a careful treatment of BiCMOS forms introduces the reader to the combination of both FET and bipolar technologies on the same chip to provide improved performance. | 1 Introduction to CMOS.- 1.1 Why Study CMOS?.- 1.2 Basic Concepts.- 1.2.1 Switch Logic.- 1.2.2 Logic Transmission.- 1.2.3 Data storage.- 1.2.4 Dynamic CMOS.- 1.2.5 CMOS System Design.- 1.3 Plan of the Book.- 1.4 References.- 2 MOSFET Characteristics.- 2.1 Threshold Voltage.- 2.1.1 Body-Bias.- 2.2 Current-Voltage Characteristics.- 2.2.1 Square-Law Model.- 2.2.2 Bulk-Charge Model.- 2.3 p-Channel MOSFETs.- 2.4 MOSFET Capacitances.- 2.4.1 MOS-Based Capacitances.- 2.4.2 Depletion Capacitance.- 2.4.3 Channel Capacitances.- 2.4.4 Device Model.- 2.5 Junction Leakage Currents.- 2.6 Parasitic Resistances.- 2.6.1 Drain and Source Resistance.- 2.6.2 Contact Resistance.- 2.7 Non-Rectangular MOSFET Gates.- 2.8 Mobility Variations.- 2.8.1 Velocity-Saturation Effects.- 2.8.2 Gate Voltage Reduction.- 2.9 Subthreshold Current.- 2.10 Temperature Dependence.- 2.11 Scaling Theory.- 2.11.1 Full-Voltage Scaling.- 2.11.2 Constant-Voltage Scaling.- 2.11.3 Second-Order Scaling Effects.- 2.12 Short-Channel Effects.- 2.12.1 Short-Channel Definition.- 2.12.2 Threshold Voltage Reduction.- 2.12.3 Short-Channel MOSFET Model.- 2.13 Narrow-Width Threshold Voltage.- 2.14 Hot Electrons.- 2.15 MOSFET Modelling in SPICE.- 2.15.1 SPICE2 MOSFET Model.- 2.15.2 BSIM.- 2.16 References.- 3 The CMOS Inverter.- 3.1 Circuit Operation.- 3.1.1 DC Inverter Calculations.- 3.1.2 Symmetrical Inverter.- 3.2 Inverter Switching Characteristics.- 3.2.1 Switching Intervals.- 3.3 Output Capacitance.- 3.4 Secondary Parasitic Effects.- 3.4.1 Leakage Currents.- 3.4.2 Parasitic Resistances.- 3.5 Comparison with SPICE.- 3.5.1 Capacitances.- 3.5.2 MOSFET Models.- 3.5.3 Input Waveforms.- 3.6 Inverter Design.- 3.7 The Power-Delay Product.- 3.8 Temperature Dependence.- 3.9 References.- 4 Static Logic Circuits.- 4.1 General Structure.- 4.2 Series-Connected MOSFETs.- 4.2.1 Discharging Through an nMOS Chain.- 4.2.2 Charging Through a pMOS Chain.- 4.2.3 Body-Bias Effects.- 4.3 NAND Gate.- 4.3.1 DC Characteristics.- 4.3.2 Transient Characteristics.- 4.3.3 Design.- 4.3.4 N-Input NAND.- 4.4 NOR Gate.- 4.4.1 DC Characteristics.- 4.4.2 Transient Times.- 4.4.3 Design.- 4.4.4 N-Input NOR.- 4.5 Comparison of NAND and NOR Gates.- 4.6 OR and AND Gates.- 4.7 Combinational Logic.- 4.7.1 Logic Formation.- 4.7.2 Canonical Logic Forms.- 4.7.3 Circuit Design.- 4.8 Exclusive-OR and Equivalence.- 4.9 Structural Variations.- 4.10 Tri-State Output.- 4.11 Pseudo-nMOS/pMOS Logic.- 4.11.1 Pseudo-nMOS.- 4.11.2. Seller Inventory # K9781461366096

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Book Description Springer-Verlag New York Inc., 1991. PAP. Condition: New. New Book. Shipped from US within 10 to 14 business days. THIS BOOK IS PRINTED ON DEMAND. Established seller since 2000. Seller Inventory # IQ-9781461366096

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Book Description Springer-Verlag New York Inc., United States, 2011. Paperback. Condition: New. Language: English . This book usually ship within 10-15 business days and we will endeavor to dispatch orders quicker than this where possible. Brand New Book. During the last decade, CMOS has become increasingly attractive as a basic integrated circuit technology due to its low power (at moderate frequencies), good scalability, and rail-to-rail operation. There are now a variety of CMOS circuit styles, some based on static complementary con- ductance properties, but others borrowing from earlier NMOS techniques and the advantages of using clocking disciplines for precharge-evaluate se- quencing. In this comprehensive book, the reader is led systematically through the entire range of CMOS circuit design. Starting with the in- dividual MOSFET, basic circuit building blocks are described, leading to a broad view of both combinatorial and sequential circuits. Once these circuits are considered in the light of CMOS process technologies, impor- tant topics in circuit performance are considered, including characteristics of interconnect, gate delay, device sizing, and I/O buffering. Basic circuits are then composed to form macro elements such as multipliers, where the reader acquires a unified view of architectural performance through par- allelism, and circuit performance through careful attention to circuit-level and layout design optimization. Topics in analog circuit design reflect the growing tendency for both analog and digital circuit forms to be combined on the same chip, and a careful treatment of BiCMOS forms introduces the reader to the combination of both FET and bipolar technologies on the same chip to provide improved performance. Softcover reprint of the original 1st ed. 1992. Seller Inventory # LIE9781461366096

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