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Synopsis
This book describes scalable and near-optimal, processor-level design space exploration (DSE) methodologies. The authors present design methodologies for data storage and processing in real-time, cost-sensitive data-dominated embedded systems. Readers will be enabled to reduce time-to-market, while satisfying system requirements for performance, area, and energy consumption, thereby minimizing the overall cost of the final design.
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From the Back Cover
This book describes scalable and near-optimal, processor-level design space exploration (DSE) methodologies. The authors present design methodologies for data storage and processing in real-time, cost-sensitive data-dominated embedded systems. Readers will be enabled to reduce time-to-market, while satisfying system requirements for performance, area, and energy consumption, thereby minimizing the overall cost of the final design.
• Describes design space exploration (DSE) methodologies for data storage and processing in embedded systems, which achieve near-optimal solutions with scalable exploration time;
• Presents a set of principles and the processes which support the development of the proposed scalable and near-optimal methodologies;
• Enables readers to apply scalable and near-optimal methodologies to the intra-signal in-place optimization step for both regular and irregular memory accesses.
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Scalable and Near-Optimal Design Space Exploration for Embedded Systems.
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Scalable and Near-Optimal Design Space Exploration for Embedded Systems
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Springer International Publishing, 2014
ISBN 10: 3319049410
ISBN 13: 9783319049410
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Scalable and Near-Optimal Design Space Exploration for Embedded Systems (Hardcover)
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Springer International Publishing AG, Cham, 2014
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Hardcover. Condition: new. Hardcover. This book describes scalable and near-optimal, processor-level design space exploration (DSE) methodologies. The authors present design methodologies for data storage and processing in real-time, cost-sensitive data-dominated embedded systems. Readers will be enabled to reduce time-to-market, while satisfying system requirements for performance, area, and energy consumption, thereby minimizing the overall cost of the final design. This book describes scalable and near-optimal, processor-level design space exploration (DSE) methodologies. Readers will be enabled to reduce time-to-market, while satisfying system requirements for performance, area, and energy consumption, thereby minimizing the overall cost of the final design. Shipping may be from multiple locations in the US or from the UK, depending on stock availability. Seller Inventory # 9783319049410
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