A Genetic Algorithm for VLSI Floorplanning: An intuitive approach to optimisation and miniaturisation of IC

 
9783659192388: A Genetic Algorithm for VLSI Floorplanning: An intuitive approach to optimisation and miniaturisation of IC
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VLSI design suffers from high design complexity and a large number of optimization objectives requiring hierarchical design approaches and multi-objective optimization techniques. The floorplanning stage of the design cycle becomes highly important in hierarchical design methods. The classical floor planning techniques use block packing to minimize chip area, by making use of algorithms like B-TREE representation, simulated annealing. To get an optimal solution it is imperative to choose an efficient algorithm. In this work, a genetic algorithm based floorplanner has been developed.

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About the Author:

Anmol Shahani completed his Bachelors of Engineering in Electronics and Telecommunication from the University of Mumbai. He will be pursuing Masters of Science in Electrical and Computer Engineering from USA. His interests include Computer Architecture, Microprocessor System Design.

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Book Description Condition: New. Publisher/Verlag: LAP Lambert Academic Publishing | An intuitive approach to optimisation and miniaturisation of IC | VLSI design suffers from high design complexity and a large number of optimization objectives requiring hierarchical design approaches and multi-objective optimization techniques. The floorplanning stage of the design cycle becomes highly important in hierarchical design methods. The classical floor planning techniques use block packing to minimize chip area, by making use of algorithms like B-TREE representation, simulated annealing. To get an optimal solution it is imperative to choose an efficient algorithm. In this work, a genetic algorithm based floorplanner has been developed. | Format: Paperback | Language/Sprache: english | 72 pp. Seller Inventory # K9783659192388

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Book Description LAP Lambert Academic Publishing Jul 2012, 2012. Taschenbuch. Condition: Neu. Neuware - VLSI design suffers from high design complexity and a large number of optimization objectives requiring hierarchical design approaches and multi-objective optimization techniques. The floorplanning stage of the design cycle becomes highly important in hierarchical design methods. The classical floor planning techniques use block packing to minimize chip area, by making use of algorithms like B-TREE representation, simulated annealing. To get an optimal solution it is imperative to choose an efficient algorithm. In this work, a genetic algorithm based floorplanner has been developed. 72 pp. Englisch. Seller Inventory # 9783659192388

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Book Description LAP Lambert Academic Publishing Jul 2012, 2012. Taschenbuch. Condition: Neu. Neuware - VLSI design suffers from high design complexity and a large number of optimization objectives requiring hierarchical design approaches and multi-objective optimization techniques. The floorplanning stage of the design cycle becomes highly important in hierarchical design methods. The classical floor planning techniques use block packing to minimize chip area, by making use of algorithms like B-TREE representation, simulated annealing. To get an optimal solution it is imperative to choose an efficient algorithm. In this work, a genetic algorithm based floorplanner has been developed. 72 pp. Englisch. Seller Inventory # 9783659192388

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Book Description LAP Lambert Academic Publishing. Paperback. Condition: New. 72 pages. Dimensions: 8.7in. x 5.9in. x 0.2in.VLSI design suffers from high design complexity and a large number of optimization objectives requiring hierarchical design approaches and multi-objective optimization techniques. The floorplanning stage of the design cycle becomes highly important in hierarchical design methods. The classical floor planning techniques use block packing to minimize chip area, by making use of algorithms like B-TREE representation, simulated annealing. To get an optimal solution it is imperative to choose an efficient algorithm. In this work, a genetic algorithm based floorplanner has been developed. This item ships from multiple locations. Your book may arrive from Roseburg,OR, La Vergne,TN. Paperback. Seller Inventory # 9783659192388

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Book Description LAP Lambert Academic Publishing, Germany, 2012. Paperback. Condition: New. Aufl.. Language: English . Brand New Book ***** Print on Demand *****.VLSI design suffers from high design complexity and a large number of optimization objectives requiring hierarchical design approaches and multi-objective optimization techniques. The floorplanning stage of the design cycle becomes highly important in hierarchical design methods. The classical floor planning techniques use block packing to minimize chip area, by making use of algorithms like B-TREE representation, simulated annealing. To get an optimal solution it is imperative to choose an efficient algorithm. In this work, a genetic algorithm based floorplanner has been developed. Seller Inventory # AAV9783659192388

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