Digital VLSI Chip Design With Cadence and Synopsys CAD Tools

Brunvand, Erik

ISBN 10: 0321547993 / ISBN 13: 9780321547996

Published by Addison-Wesley, 2009

About this Item

1st edition. 571 pages. 8.75x7.00x1.00 inches. In Stock.

Seller Inventory # zk0321547993

Bibliographic Details

• Title: Digital VLSI Chip Design With Cadence and Synopsys CAD Tools
• Publisher: Addison-Wesley
• Publication Date: 2009
• Language: English
• ISBN 10: 0321547993
• ISBN 13: 9780321547996
• Binding: Paperback
• Condition: Brand New

About this title

Synopsis

Digital VLSI Chip Design with Cadence and Synopsys CAD Tools leads students through the complete process of building a ready-to-fabricate CMOS integrated circuit using popular commercial design software. Detailed tutorials include step-by-step instructions and screen shots of tool windows and dialog boxes. This hands-on book is for use in conjunction with a primary textbook on digital VLSI.

About the Author

Professor Erik Brunvand is an associate professor in the School of Computing at the University of Utah. He has interests in computer architecture and VLSI systems in general, and self-timed and asynchronous systems in particular. One aspect of his research involves compiling concurrent communicating programs into asynchronous VLSI circuits. The current system allows programs written in a subset of occam, a concurrent message-passing programming language based on CSP, to be automatically compiled into a set of self-timed circuit modules suitable for manufacture as an integrated circuit. He is also interested in investigating the effects of asynchrony on computer systems architecture at a higher level. To explore these ideas he is building a series of prototype asynchronous computer systems out of FPGA and custom VLSI chips.