Fault-Tolerance and Reliability Techniques for High-Density Random-Access Memories (Prentice Hall Modern Semiconductor Design Series) - Hardcover

Chakraborty, Kanad; Mazumder, Pinaki

Hardcover

ISBN 10: 0130084654 ISBN 13: 9780130084651

Publisher: Prentice Hall, 2002

Synopsis

Surveys the latest research and field-proven techniques for every form of memory fault tolerance, including manufacturing, online, and field-related fault tolerance. Authors focus on practical circuit and design solutions.

About this title

From the Back Cover:

The state of the art in fault-tolerant RAM development and production.

• Embedded RAM for SoC design: practical circuit and layout design principles and techniques
• State-of-the-art manufacturing, online, and field-related fault tolerance
• Structured custom design solutions for self-testable/self-repairable embedded RAMs
• Includes extensive illustrations and examples, plus a compendium of 500+ research papers

Next-generation electronic devices require advanced new nanofabrication CMOS technologies—and, in these environments, today's processing techniques simply will not produce adequate yields. To improve RAM reliability without compromising performance, cost, or space requirements, engineers are turning to advanced fault-tolerant techniques. In this book, Kanad Chakraborty and Pinaki Mazumder survey the latest research and field-proven techniques for every form of memory fault tolerance, including manufacturing, online, and field-related fault tolerance. Coverage includes:

• Embedded RAM for SoC design: practical circuit and layout design principles and techniques
• New research into the mechanisms underlying soft and hard failures
• Understanding the impact of scaling on reliability
• Modeling and analysis of manufacturing yield
• Manufacturing fault tolerance: built-in self-diagnosis and repair, reconfiguration, repair via EEPROM switches, flexible redundancy, and more
• Techniques for mitigating radiation-induced single-event effects
• Field fault tolerance: error correcting codes and associated circuit techniques
• Structured custom design solutions for self-testable and self-repairable embedded RAMs: circuit and physical design

Chakraborty and Mazumder focus on practical circuit and design solutions, presenting extensive illustrations and explaining device physics and circuit design theory in a reader-friendly manner. They also provide a compendium of more than 500 research papers on memory fault tolerance and reliability. Whether you're a design engineer, test engineer, manufacturer, or researcher, this is a comprehensive resource for building next-generation RAM with next-generation reliability.

Modern Semiconductor Design Series

About the Author:

KANAD CHAKRABORTY is currently Member of Technical Staff, Agere Systems Research (Communications Systems Technology Lab). He was formerly a software engineer and researcher with IBM's Electronic Design Automation Lab. His contributions include development of novel fault-tolerant memory architectures, algorithms for multiport memory testing, new design automation approaches, and neural network applications.

PINAKI MAZUMDER is Professor in the Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor. His research interests include nanoelectronic and quantum electronic circuits and simulation, digital and analog testing, VLSI system design, and VLSI Layout Automation. He is a Fellow of IEEE. Mazumder and Chakraborty are co-authors of Testing and Testable Design of High-Density Random-Access Memories.

About this edition

• Publisher: Prentice Hall
• Publication date: 2002
• ISBN 10: 0130084654
• ISBN 13: 9780130084651
• Binding: Hardcover
• Number of pages: 426