9780071437868

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HIGH-POWER DESIGN FOR LOW-POWER CHIPS

Detailing the latest techniques in low-voltage VLSI design, Low-Voltage, Low-Power VLSI Subsystems is a focused tutorial providing immediate access to state-of-the-art, proven design techniques in CMOS, BiCMOS, and other in-demand applications. In this unique resource, Professors Yeo and Roy offer electronic and IC designers as well as students:

• New approaches to the challenges of silicon-level design for low-power circuitry pacing electronics and ICs
• Low-power solutions for adders, multipliers, ROMs, SRAMs, DRAMs, and signal processors
• Expert performance comparisons and contrasts of low-power options
• Reduced-complexity design solutions
• Optimization and implementation techniques indispensable in modern VLSI/ULSI subsystem design
• Useful charts, illustrations, and applied algorithms
• Clear presentations of complex topics
• Real-life examples clarifying key concepts
• An invaluable reference and practical guide to the latest in optimized VLSI/ULSI subsystem design

Detailing the latest techniques in low-voltage VLSI design, Yeo (electrical and electronic engineering, Nanyang Technological University, Singapore) and Roy (electrical and computer engineering, Purdue University) provide access to proven design techniques in CMOS, biCMOS, and other in-demand applications. They introduce new approaches to the challenges of silicon-level design for low-power circuitry pacing electronics and ICs, and present low-power solutions for adders, multipliers, ROMs, SRAMs, DRAMs, and signal processors. The readership for the book includes electronic and IC designers.

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