7th International Symposium on High Performance Computer Architecture (Hpc A-7 2001

Twenty-six papers from the January 2001 symposium present research findings in microarchitecture, memory architectures, multiprocessor systems, code generation techniques, energy and thermal management, prediction techniques, application-specific designs, performance modeling and analysis, and latency tolerance techniques. Some of the topics are register renaming and scheduling for dynamic execution of predicated code, self-tuned congestion control for multiprocessor networks, DRAM energy management using software and hardware directed power mode control, DLP+TLP processors for the next generation of media workloads, and a delay model and speculative architecture for pipelined routers. No subject index. Annotation c. Book News, Inc., Portland, OR (booknews.com)