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VLSI Test Principles and Architectures: Design for Testability (Morgan Kaufmann Series in Systems on Silicon (Hardcover)) - Hardcover
Synopsis
This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume.
- Most up-to-date coverage of design for testability.
- Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books.
- Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures.
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About the Authors
Laung-Terng Wang, Ph.D., is founder, chairman, and chief executive officer of SynTest Technologies, CA. He received his EE Ph.D. degree from Stanford University. A Fellow of the IEEE, he holds 18 U.S. Patents and 12 European Patents, and has co-authored/co-edited two internationally used DFT textbooks- VLSI Test Principles and Architectures (2006) and System-on-Chip Test Architectures (2007).
Kwang-Ting (Tim) Cheng, Ph.D., is a Professor and Chair of the Electrical and Computer Engineering Department at the University of California, Berkeley. A Fellow of the IEEE, he has published over 300 technical papers, co-authored three books, and holds 11 U.S. Patents.
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VLSI Test Principles and Architectures: Design for Testability (Morgan Kaufmann Series in Systems on Silicon (Hardcover))
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VLSI Test Principles and Architectures: Design for Testability
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VLSI Test Principles and Architectures: Design for Testability (The Morgan Kaufmann Series In Systems On Silicon) Wang, Laung-Terng, Cheng-Wen Wu and Xiaoqing Wen
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