Computer Organization and Design: The Hardware/Software Interface. Third Edition, Revised - Softcover

David A. Patterson

Softcover

ISBN 10: 0123706068 ISBN 13: 9780123706065

Publisher: Morgan Kaufmann, 2007

Synopsis

Book by Patterson, David A., Hennessy, John L.

About this title

Book Description

A thourough update of the Morgan Kaufmann classic.

From the Back Cover

The performance of software systems is dramatically affected by how well software designers understand the basic hardware technologies at work in a system. Similarly, hardware designers must understand the far-reaching effects their design decisions have on software applications. For readers in either category, this classic introduction to the field provides a look deep into the computer. It demonstrates the relationships between the software and hardware and focuses on the foundational concepts that
are the basis for current computer design.

As with previous editions, a MIPS processor is the core used to present the fundamentals of hardware technologies at work in a computer system. The book presents an entire MIPS instruction setinstruction by instructionthe fundamentals of assembly language, computer arithmetic, pipelining, memory hierarchies, and I/O, and introduces the essentials of network and multiprocessor architectures.

A new aspect of the third edition is the explicit connection between program performance and CPU performance. The authors show how hardware and software componentssuch as the specific algorithm, programming language, compiler, instruction set architecture, and processor implementationimpact program performance. This edition also digs deeper into related hardware and software issues, offering specific material on the CD for readers with a hardware or software focus.

A CD provides a toolkit of simulators and compilers along with tutorials for using them.

Also by the same authors: Computer Architecture: A Quantitative Approach, Third Edition, the classic reference for computer systems analysis and design.

F E A T U R E S
* Entire text has been updated to reflect new technology
* Uses standard 32-bit MIPS 32 as the primary teaching ISA
* Highlights the latest developments in architecture:
+ Intel IA-32
+ Power PC 604
+ Pentium P4
+ Googles PC cluster
+ SPEC CPU2000 benchmark suite for processors
+ vSPEC Web99 benchmark for web
+ EEMBC benchmark for embedded systems
+ AMD Opteron memory hierarchy
+ AMD vs. 1A-64
+ Intrinsitys FastMATH processor servers
* New material for a Hardware Focus
+ Using logic design conventions
+ Designing with hardware description languages
+ Advanced pipelining
+ Designing with FPGAs
+ HDL simulators and tutorials
+ Xilinx CAD tools
* New material for a Software Focus
+ How compilers work
+ How to optimize compilers
+ How to implement object oriented languages
+ History sections on programming languages, compilers, operating systems, and databases

Edition details

• Publisher: Morgan Kaufmann
• Publication date: 2007
• ISBN 10: 0123706068
• ISBN 13: 9780123706065
• Binding: Paperback
• Language: English
• Number of pages: 741