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Low Power Design for Microprocessors and System on Chip: Nanometer and System-Level Design - Hardcover
Synopsis
In highly mobile, frequently wireless applications like cell phones, the trend is towards smaller and lighter weight packaging yet with increasing functionality and lower price. The demand from end users for increased battery service life is considerable. Reducing on-chip power consumption has become a critical challenge for System-on-Chip (SOC) designers. A new way of thinking about Low power will be necessary to succeed in the consumer electronics arena going forward. Low power design techniques will be used from the earliest phase of the design cycle to have the maximum impact on power convergence and optimization.
As Lead Engineers for Intel and Marvell, respectively, Subhomoy Chattopadhyay and Rakesh Patel work daily at the leading edge of R&D on low power design. This book contains an industry perspective on low power design not currently available, with its focus on the deep sub-micron designs currently needed to achieve the functionality/low-power needs described above.
- First book to cover this topic with a state-of-the-art (known as "deep, sub-micron"), industry perspective (authors from Intel and Marvell)
- One of the 3 hotest topics in the Electronic Design Automation market today
- Notable, two-author team presents coherent content, rather than collection of discrete chapters (available to date from competition)
"synopsis" may belong to another edition of this title.
Review
"Other books presently on the market do not address the more difficult practical issues that are encountered by today's state-of-the-art chips."
-Don Bouldin, University of Tennessee
"The major strength of the book is the coverazge of all the really crucial aspects of the design of a modern digital system from the power efficiency point of view...It is the first book covering in a systematic way problems and solutions related to ultra deep sub micron design and optimization."
-Salvatore Carta, University of Cagliari
"Major strength is a comprehensive "soup to nuts" coverage of low power design and power reduction including architectural tradeoffs and reliability."
-Shantanu Ganguly, Qualcom, Inc.
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