The proceedings of ICCAD 94, a conference for EE CAD professionals, comprise technical sessions in such areas as multi-level logic optimization; memory issues in high-level synthesis; partitioning/clustering; FPGA synthesis and architecture; concurrency modeling and estimation; timing modeling and simulation; retiming and sequential technology mapping; technology CAD; estimation techniques for power consumption; optimization for low power; embedded software ear; timing optimization by gate sizing; and analog and mixed-signal DFT. There are also embedded tutorials on design of heterogeneous ICs for mobile and personal communication systems, and embedded systems design for low energy consumption. No index. Annotation copyright Book News, Inc. Portland, Or.
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