Synopsis
Containing complete and detailed information on design to, and compliance with, all of the PCI and PCI-X bus specifications, this book covers hardware design and the hardware and software requirements for systems with multiple bridges and bus segments. Also covered are signal line definitions and the functional interaction between PCI resources.
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About the Author
Edward Solari, while at the Intel Architecture Labs, worked closely with the PCI Special Interest Group and was involved in the development of PCI chip sets, AT compatible platform designs, and telephony projects. Before retiring from Intel, he worked on the Merced chip set. George Willse, also from the Intel Architecture Labs, was the Senior BIOS Engineer for the first PCI-based system BIOS. He has worked on Advanced Plug and Play BIOS development, and is presently a senior engineer working on advanced platform processes and development.
"About this title" may belong to another edition of this title.
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