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Synopsis
J. Bhasker
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About the Author
J. Bhasker is a Senior Architect at Cadence Design Systems. He was a Distinguished Member of Technical Staff at Bell Laboratories. He has written a number of other books on hardware description languages and synthesis including the bestselling books "A VHDL Primer" and "A Verilog HDL Primer". Bhasker has a Ph.D. in Computer Science from the University of Minnesota, M.Tech. in Computer Technology and a B.Tech. in Electrical Engineering from the Indian Institute of Technology, New Delhi.
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Systemc Primer
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Systemc Primer
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