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Synopsis
Nowaday, the supper low noise PLL oscillator and the supper low jitter synthesizer have been used in the worldwide communications system. Where, the former is used for the satellite communications and the latter is used for the cellular phone. The main idea to obtain a supper low noise PLL oscillator is to use a high Q resonator, such as the dielectric resonator, with a suitable phase-locked loop. To design a supper low jitter synthesizer, the best way is to set up a solid background about the synthesizer, which includes: The analogy PLL oscillator (linear analysis and nonlinear analysis), The digital PLL oscillator, using the symbol analysis and the analog PLL analysis, The synthesizer, using the symbol analysis and the sample PLL analysis. Mean while, the digital-hybrid PLL can be used for the 10 Gbit/s data recovery in the 10 Gbit/s optical fiber transponder. This book will provide you all of those information. Meanwhile, provider you the design formulas, design examples and the final schematics. The author have been involved in the design and development of all of those projects above for almost 30 years. Therefore, this book is very clear not only in theoretical analysis but also in experimental.
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About the Author
Han-xiong Lian is a professor in microwave and optical fiber telecommunications in Beijing University of Posts and Telecommunications, a visiting professor in Simon Fraser University in Canada, a senior engineer in Northern Telecom. Canada, FEI Inc. USA, Multiplex Inc. USA. He has published a book "Analytical Technology in theory of electromagnetic field in RF, Wireless and Optical fiber communications" by iUniverse Inc. A 10Gbit/s optical fiber transponder designed by Han-xiong Lian and Yin-xiu Ye in Multiplex Inc. USA has been installed in USA, Canada, China, India for the optical fiber communication system. Co-authors: Ying-xiu Ye is a senior in Beijing Microwave Factory, in Northern Telecom. Canada, in FEI Inc. USA, in Multiplex Inc. USA. Wenlei Lian is a Technical Account Manager, in Keysight Technologies Inc, USA.
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- PublisheriUniverse
- Publication date2014
- ISBN 10 1491748648
- ISBN 13 9781491748640
- BindingPaperback
- LanguageEnglish
- Number of pages418
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Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Nowaday, the supper low noise PLL oscillator and the supper low jitter synthesizer have been used in the worldwide communications system. Where, the former is used for the satellite communications and the latter is used for the cellular phone. The main idea to obtain a supper low noise PLL oscillator is to use a high Q resonator, such as the dielectric resonator, with a suitable phase-locked loop. To design a supper low jitter synthesizer, the best way is to set up a solid background about the synthesizer, which includes: ¿ The analogy PLL oscillator (linear analysis and nonlinear analysis), ¿ The digital PLL oscillator, using the symbol analysis and the analog PLL analysis, ¿ The synthesizer, using the symbol analysis and the sample PLL analysis. Mean while, the digital-hybrid PLL can be used for the 10 Gbit/s data recovery in the 10 Gbit/s optical fiber transponder. This book will provide you all of those information. Meanwhile, provider you the design formulas, design examples and the final schematics. The author have been involved in the design and development of all of those projects above for almost 30 years. Therefore, this book is very clear not only in theoretical analysis but also in experimental. 418 pp. Englisch. Seller Inventory # 9781491748640
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Supper low noise PLL Oscillator and Low Jitter Synthesizer : Theory and Design
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Taschenbuch. Condition: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Nowaday, the supper low noise PLL oscillator and the supper low jitter synthesizer have been used in the worldwide communications system. Where, the former is used for the satellite communications and the latter is used for the cellular phone. The main idea to obtain a supper low noise PLL oscillator is to use a high Q resonator, such as the dielectric resonator, with a suitable phase-locked loop. To design a supper low jitter synthesizer, the best way is to set up a solid background about the synthesizer, which includes: ¿ The analogy PLL oscillator (linear analysis and nonlinear analysis), ¿ The digital PLL oscillator, using the symbol analysis and the analog PLL analysis, ¿ The synthesizer, using the symbol analysis and the sample PLL analysis. Mean while, the digital-hybrid PLL can be used for the 10 Gbit/s data recovery in the 10 Gbit/s optical fiber transponder. This book will provide you all of those information. Meanwhile, provider you the design formulas, design examples and the final schematics. The author have been involved in the design and development of all of those projects above for almost 30 years. Therefore, this book is very clear not only in theoretical analysis but also in experimental. Seller Inventory # 9781491748640
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Supper low noise PLL Oscillator and Low Jitter Synthesizer
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Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. KlappentextrnrnNowaday, the supper low noise PLL oscillator and the supper low jitter synthesizer have been used in the worldwide communications system. Where, the former is used for the satellite communications and the latter is used for the ce. Seller Inventory # 447942618
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