Dr. Lenoski and Dr. Weber have experience with leading-edge research and practical issues involved in implementing large-scale parallel systems. They were key contributors to the architecture and design of the DASH multiprocessor. Currently, they are involved with commercializing scalable shared-memory technology.
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Dr. Lenoski has experience with leading-edge research and practical issues involved in implementing large-scale parallel systems. He was a key contributor to the architecture and design of the DASH multiprocessor. Currently, he is involved with commercializing scalable shared-memory technology.
A thorough presentation of the architecture, hardware design and performance of scalable shared-memory multiprocessors. This emerging class of computers combines the computational power found in large-scale multicomputers with the ease of programming found in traditional small-scale shared-memory processors.
The authors draw from their experience with the DASH prototype to design a detailed case study of the first operational machine to include a scalable cache-coherence mechanism. This book will appeal to practitioners involved with the design of commercial systems who are looking to move beyond today's bus-based architectures, and to researchers studying parallel architecture. -- Book Description
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Seller: Revaluation Books, Exeter, United Kingdom
Paperback. Condition: Brand New. 364 pages. 9.50x7.25x0.82 inches. In Stock. Seller Inventory # zk1493306146
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