Real Chip Design and Verification Using Verilog and VHDL - Softcover

Cohen, Ben

Softcover

ISBN 10: 1539769712 ISBN 13: 9781539769712

Publisher: CreateSpace Independent Publishing Platform, 2002

Synopsis

Real Chip Design and Verification Using Verilog and VHDL addresses the practical and real aspects of logic design, processes, and verification. It incorporates a collection of FPGA and ASIC design practices, and uses Verilog and VHDL as a tool for expression of the desired architectures. This book is not intended to teach either HDL, as there are several books specifically geared toward teaching the languages. However, it provides various architectural design primitives, applications, and verification techniques, along with design methodologies and common practices.

About this title

About the Author

Ben Cohen authored the following books:

VHDL Coding Styles and Methodologies,
first and second editions,
VHDL Answers to Frequently Asked Questions, first and second editions
Component Design by Example
... a Step-by-Step Process Using VHDL with UART as Vehicle

Review

.. a pragmatic author. His topics ... very accessible and pertinent to the engineering community ... Focus is to learn by example -- Synplicity, Andrew R. Dauman, Vice-President of Corporate Applications

.. best investments that a logic designer can make. ... of enormous value to all those involved in HDL-based chip design .. -- Rahul Razdan, Corporate Vice President - Systems and Functional Verification.

Edition details

• Publisher: CreateSpace Independent Publishing Platform
• Publication date: 2002
• Language: English
• ISBN 10: 1539769712
• ISBN 13: 9781539769712
• Binding: Paperback
• Number of pages: 424