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Synopsis
This book presents the detailed design and implementation of an FPGA-based image and video co- processor. Central to this environment is a hierarchical library of efficient hardware architectures for image and video applications, and a Prolog-based hardware description notation called HIDE. The environment also includes a high level generator which takes image processing high level algorithm descriptions based on the abstractions of image algebra and translates automatically into a HIDE hardware description. The latter is then automatically translated into low level FPGA hardware in EDIF netlist format. Central to the satisfaction of the dual requirement of high level design and low level hardware efficiency is the novel concept of hardware skeletons, which act as a bridge between the two levels. These are reusable architectural frameworks, which can take function blocks and possibly other skeletons as parameters while encapsulating all of the low level hardware dependent optimisations. This is illustrated in this book through a real hardware implementation on a commercial FPGA board.
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Software and Hardware Architectures for FPGA-based Image Processing
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Software and Hardware Architectures for FPGA-based Image Processing
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VDM Verlag Dr. M�ller 2010-02-25, 2010
ISBN 10: 3639239237
ISBN 13: 9783639239232
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Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Benkrid KhaledDr Khaled Benkrid is a Lecturer in Electronic Engineering at the University of Edinburgh. His research interests include high performance reconfigurable computing and electronic design automation. Dr. Benkrid holds . Seller Inventory # 151373954
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Software and Hardware Architectures for FPGA-based Image Processing
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Taschenbuch. Condition: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - This book presents the detailed design and implementation of an FPGA-based image and video co- processor. Central to this environment is a hierarchical library of efficient hardware architectures for image and video applications, and a Prolog-based hardware description notation called HIDE. The environment also includes a high level generator which takes image processing high level algorithm descriptions based on the abstractions of image algebra and translates automatically into a HIDE hardware description. The latter is then automatically translated into low level FPGA hardware in EDIF netlist format. Central to the satisfaction of the dual requirement of high level design and low level hardware efficiency is the novel concept of hardware skeletons, which act as a bridge between the two levels. These are reusable architectural frameworks, which can take function blocks and possibly other skeletons as parameters while encapsulating all of the low level hardware dependent optimisations. This is illustrated in this book through a real hardware implementation on a commercial FPGA board. Seller Inventory # 9783639239232
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Software and Hardware Architectures for FPGA-based Image Processing
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