Fundamental optimized AES algorithm design in FPGA - Softcover

Deshpande, Hrushikesh; Karande, Kailash

 
9783659863523: Fundamental optimized AES algorithm design in FPGA
Softcover
ISBN 10: 3659863521 ISBN 13: 9783659863523
Publisher: LAP LAMBERT Academic Publishing, 2016

Synopsis

This book mainly focuses research in recent area of Network Security algorithm and its optimized design in area optimization domain. This book is intended for a broad range of readers who will benefits from an understanding of AES algorithm and its overall process associated with VHDL software implementation on Xilinx FPGA device. This includes students and professionals in the field of data processing and data communication, designers and implementers and data communication and networking customers and managers. This book is designed to be self –contained .For reader with little or more background of cryptographic algorithms.

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About the Author

Prof. H.S.Deshpande working as a Assistant Professor in S.K.N.Sinhgad college of Engineering ,Completed his ME(Electronics Engineering) with project based on optimized implementation of network security algorithm in FPGA. The optimization done in area by reducing slices count with preferable use of Static RAM structure in FPGA CLBs.

"About this title" may belong to another edition of this title.

Publisher
LAP LAMBERT Academic Publishing
Publication date
2016
Language
English
ISBN 10 
3659863521
ISBN 13 
9783659863523
Binding
Paperback
Number of pages
112