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Synopsis
The design, total power, static power, dynamic power, Transient time, transient delay and static current in 8T SRAM and 10T SRAM cell are calculated and compared. The 8T SRAM has the least transistor count and least area efficient, but speed of operation is somewhat reduced. Further, increase in the transistor count in 10T SRAM cell, however, makes area and delay large in room temperature. When temperature increases from a particular value, the 10T SRAM cell performs better than the 8T SRAM cell. This justifies the use of 10T SRAM cell for low power applications with varying temperature conditions. The proposed SRAM memory design can be implemented in any digital circuit.
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Analysis of SRAM Cells for Power Reduction Using Low Power Techniques
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LAP LAMBERT Academic Publishing Okt 2018, 2018
ISBN 10: 6139900654
ISBN 13: 9786139900657
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Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germany
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Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The design, total power, static power, dynamic power, Transient time, transient delay and static current in 8T SRAM and 10T SRAM cell are calculated and compared. The 8T SRAM has the least transistor count and least area efficient, but speed of operation is somewhat reduced. Further, increase in the transistor count in 10T SRAM cell, however, makes area and delay large in room temperature. When temperature increases from a particular value, the 10T SRAM cell performs better than the 8T SRAM cell. This justifies the use of 10T SRAM cell for low power applications with varying temperature conditions. The proposed SRAM memory design can be implemented in any digital circuit. 152 pp. Englisch. Seller Inventory # 9786139900657
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Analysis of SRAM Cells for Power Reduction Using Low Power Techniques
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Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Rukkumani V.Dr.V.Rukkumani-Associate Professor,Dr.K.Srinivasan,Professor and Head,Sri Ramakrishna Engineering College,Coimbatore Dr.N.Devarajan, Dean, Sri Ramakrishna Institute of Technology,Coimbatore,Tamilnadu,IndiaThe design, . Seller Inventory # 385876546
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Analysis of SRAM Cells for Power Reduction Using Low Power Techniques
Published by
LAP LAMBERT Academic Publishing Okt 2018, 2018
ISBN 10: 6139900654
ISBN 13: 9786139900657
New
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Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germany
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Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -The design, total power, static power, dynamic power, Transient time, transient delay and static current in 8T SRAM and 10T SRAM cell are calculated and compared. The 8T SRAM has the least transistor count and least area efficient, but speed of operation is somewhat reduced. Further, increase in the transistor count in 10T SRAM cell, however, makes area and delay large in room temperature. When temperature increases from a particular value, the 10T SRAM cell performs better than the 8T SRAM cell. This justifies the use of 10T SRAM cell for low power applications with varying temperature conditions. The proposed SRAM memory design can be implemented in any digital circuit.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 152 pp. Englisch. Seller Inventory # 9786139900657
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Analysis of SRAM Cells for Power Reduction Using Low Power Techniques
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ISBN 10: 6139900654
ISBN 13: 9786139900657
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Taschenbuch. Condition: Neu. Analysis of SRAM Cells for Power Reduction Using Low Power Techniques | V. Rukkumani (u. a.) | Taschenbuch | 152 S. | Englisch | 2018 | LAP LAMBERT Academic Publishing | EAN 9786139900657 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu. Seller Inventory # 114889567
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Analysis of SRAM Cells for Power Reduction Using Low Power Techniques
Published by
LAP LAMBERT Academic Publishing, 2018
ISBN 10: 6139900654
ISBN 13: 9786139900657
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Taschenbuch. Condition: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - The design, total power, static power, dynamic power, Transient time, transient delay and static current in 8T SRAM and 10T SRAM cell are calculated and compared. The 8T SRAM has the least transistor count and least area efficient, but speed of operation is somewhat reduced. Further, increase in the transistor count in 10T SRAM cell, however, makes area and delay large in room temperature. When temperature increases from a particular value, the 10T SRAM cell performs better than the 8T SRAM cell. This justifies the use of 10T SRAM cell for low power applications with varying temperature conditions. The proposed SRAM memory design can be implemented in any digital circuit. Seller Inventory # 9786139900657
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Analysis of SRAM Cells for Power Reduction Using Low Power Techniques
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