Advanced MTCMOS-Based Adder Architectures: RCA and Variable-Block CSLA - Softcover

Ranjan, Mrinal; Kumar, Sanjeev; Raj, Ravi

Softcover

ISBN 10: 6630481836 ISBN 13: 9786630481839

Publisher: LAP Lambert Academic Publishing, 2026

Synopsis

This book presents the design and performance analysis of low-power adder architectures for deep-submicron CMOS VLSI systems. It focuses on transistor-level implementation of Ripple Carry Adder (RCA) and variable-block Carry Select Adder (CSLA) architectures in 90 nm CMOS using Cadence Virtuoso and Spectre. The book examines 4-bit, 8-bit, 16-bit, and 32-bit configurations, with particular emphasis on the trade-offs among propagation delay, dynamic power, leakage power, Power-Delay Product (PDP), and hardware complexity. MTCMOS-based power gating using PMOS header sleep transistors is integrated to suppress standby leakage, while sleep-transistor sizing is investigated to balance leakage reduction against delay overhead. The comparative results demonstrate that RCA offers lower hardware complexity and power consumption, whereas CSLA provides superior speed. The work provides practical insights into designing energy-efficient arithmetic circuits for low-power VLSI applications.

Edition details

• Publisher: LAP Lambert Academic Publishing
• Publication date: 2026
• Language: English
• ISBN 10: 6630481836
• ISBN 13: 9786630481839
• Binding: Paperback
• Number of pages: 108