32 microcomputer principles ，connect a people's technique and its application (Chinese edidion) Pinyin: 32 wei wei xing ji suan ji yuan li ， jie kou ji shu ji qi ying yong - Softcover
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. Polytechnical University Pub Date :2012-06-01 455 Northwestern Polytechnical University Press 32 Principles of microcomputer interface technology and its applications - 3rd Edition List 55 yuan Shixin Fu compiled Press 32: N...
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32 Principles of microcomputer interface technology and its applications - 3rd Edition(Chinese Edition)
ISBN 10: 7561212097
ISBN 13: 9787561212097
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paperback. Condition: New. Ship out in 2 business day, And Fast shipping, Free Tracking number will be provided after the shipment.Paperback. Pub Date :2012-06-01 Pages: 455 Publisher: Northwestern Polytechnical University Press Title: 32 Principles of microcomputer interface technology and its applications - 3rd Edition List Price: 55 yuan Author: Shixin Fu compiled Press 32: Northwestern University Press Publication Date :2012-6-1ISBN: 9787561212097 Words: 710.000 yards: 455 Edition: 3 Binding: Paperback: 16 Product Size and Weight: Editor's Summary microcomputer principle interface technology its application as an undergraduate and graduate curriculum materials. Table of Contents Chapter Introduction 1.1 Overview 1.1.1 1.1.2 microcomputer overview of the development of microcomputer characteristics and classification 1.1.3 microprocessor wordlength 1.2 computing infrastructure 1.2.1 binary counting system and its conversion 1.2.2 binary the 1.2.5 computer in the number of four operations in 1.2.4 the number of arithmetic rules 1.2.3 computer computer signed number representation decipoint method 1.2.6 binary coding 1.2.7 logical operations and basic logic circuit 1.3 microcomputer the basic structure 1.3.1 The overall structure of the microcomputer 1.3.2 microprocessor basic internal structure of the basic structure exercises Questions Intel 32-bit CPU2.1 CPU basic structure 2.1.1 CPU 2.1.2 CPU external base pin works 2.2 2.1.3 CPU Registers 2.2.1 General Registers 2.2.2 2.2.6 the register 2.2.5 system address register debug registers instruction pointer indicator flag register - EIP2 .2.3 - EFLAGS2 .2.4 paragraph 2.4.1 debug address register register value 2.3 2.2.9 2.2.8 2.2.7 test register control register floating-point registers 2.2.10 CPU reset instruction pipeline operation 2.4 debugging features - DR0 ~ DR32.4.2 debug control register - -DR72.4.3 debug status register - DR62 .4.4 instruction breakpoint with the RF logo 2.5 floating-point components 2.6 Cache 2.6.1 cache structure 2.6.2 cache operation 2.6.3 cache control 2.6.4 cache cleaning test 2.6.6 2.6.5 cache L2 cache 2.6.7 CPU into a group transfer mode 2.7 CPU main structural logic diagram Exercises and Questions Chapter 80x86 addressing modes and instruction system 3.1 80x86 addressing 3.2.1 80x86 the way 3.1.1 Data addressing 3.1.2 program addressing the way 3.1.3 stack snow addressing modes 3.2 80x86 instruction format instruction encoding format 3.2.2 80x86 instruction format 3.3 80x86 instruction system 3.3.1 Data transfer instructions arithmetic instructions 3.3.3 logic operation instructions 3.3.2 3.3.4 to control the transfer of class instruction 3.3.5 string operation instruction 3.3.6 Input Output instruction 3.3.7 Processor Control 3.3.8 interrupted mention make DOS function calls . four chapters assembly language program design and its high-level language invoked Chapter of internal memory and its management under Chapter VII of the Chapter of the input and output of the microcomputer interrupt. Chapter 9 of Chapter VIII of task switching bus technology programmable interface chip CPU interface Chapter XI of the computer network infrastructure commonly used peripherals and Chapter XII of the man - machine interface DA. AD. converter and the CPU Interface Chapter XIII microcomputer application Appendices Appendix 1 ASCII code Table Appendix 2 Debugger DEBUG References Author Abstracts preambleFour Satisfaction guaranteed,or money back. Seller Inventory # FW011859