THE ART OF VERIFICATION WITH VER

The Art of Verification with Vera covers the essential elements of VERA with detailed examples demonstrating how the VERA testbench tool and the OpenVera language can be harnessed to effectively verify different types of designs. It helps the reader understand critical verification issues and teaches how to expedite and enhance functional design verification. This book discusses a range of verification issues, including test case identification, stimulus generation, results checking, test coverage and test regression. Theses concepts are used to develop a verification strategy and a VERA testbench for a common design. Each component of this testbench is discussed in detail to demonstrate the methodologies presented.

Faisal Haque has 20+ years experience in high-level verification and design of complex networking hardware. He was the former chair of SystemVerilog Assertions committee and is currently chairing the UCIS committee. He received his bachelors in electrical engineering from the University of Notre Dame.

Jonathan Michelson has 12+ years of experience designing and verifying complex designs. He was co-designer of a verification language and methodology at Silicon Graphics. He received his bachelors and masters degrees in electrical engineering and computer science from the Massachusetts Institute of Technology.

Khizar Khan has 9 years of experience in high-level verification and developing verification infrastructures. At Raza Microelectronics Incorporated, he is contributing to the verification of next generation microprocessors. He received his bachelors in electrical engineering from the University of Rochester.