Accelerated Computing with HIP

Yifan Sun, Trinayan Baruah, David R Kaeli

ISBN 13: 9798218107444

Published by Sun, Baruah and Kaeli, 2022

About this Item

Seller Inventory # LU-9798218107444

Bibliographic Details

• Title: Accelerated Computing with HIP
• Publisher: Sun, Baruah and Kaeli
• Publication Date: 2022
• Language: English
• ISBN 13: 9798218107444
• Binding: Paperback
• Condition: New
• Weight: 531 grams

About this title

Synopsis

The goal of this book is to provide helpful guidance to GPU programmers looking to develop HIP programs for the ROCm platform using GPUs. The reader of this book will learn how to reason through real-world problems and break them down into independent parts so that GPUs can be used to solve them efficiently. This text is designed to take programmers on a tour of GPU hardware design and demonstrate how to effectively leverage its unique hardware features to optimize software performance. Finally, the text includes instructions on how programmers can exploit the ROCm ecosystem by invoking libraries to perform linear algebra operations while leveraging multiple GPUs in one application.

About the Authors

Dr. Sun serves as an Assistant Professor in the Department of Computer Science at William and Mary. He received his Ph.D. degree from the Department of Electrical and Computer Engineering at Northeastern University in 2020. In 2013 he received his MS in Electrical Engineering from the University of Buffalo, and in 2011 received his B.Eng in Electrical Engineering from Huazhong University of Science and Technology . His research interests lie in GPU architecture, performance evaluation, and performance modeling.

Dr. Baruah is a GPU architect at AMD. He received his Ph.D. degree from the Department of Electrical and Computer Engineering at Northeastern in 2021. In 2017 he received his MS degree in Electrical and Computer Engineering from Northeastern, and in 2015 he received his B.Tech. in Electronics and Communications Engineering from VIT University. His interests lie in computer architecture and system design.

Dr. Kaeli received a BS and PhD in Electrical Engineering from Rutgers University, and an MS in Computer Engineering from Syracuse University. He is a Distinguished Full Processor on the ECE faculty at Northeastern University, Boston, MA where he directs the Northeastern University Computer Architecture Research Laboratory (NUCAR). Prior to joining Northeastern in 1993, Kaeli spent 12 years at IBM, the last 7 at T.J. Watson Research Center, Yorktown Heights, NY. Dr. is a Fellow of both the ACM and IEEE.