Advanced ASIC Chip Synthesis: Using Synopsys® Design Compiler™ Physical Compiler™ and PrimeTime®
Language: English
Published by Springer, 2013
- Softcover
- New
Seller: Ria Christie Collections, Uxbridge, United KingdomRia Christie Collections
AbeBooks seller since March 25, 2015
Condition: New
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In English.
Seller Inventory # ria9781475776294_new
- Title
- Advanced ASIC Chip Synthesis: Using Synopsys® Design Compiler™ Physical Compiler™ and PrimeTime®
- Author
- Bhatnagar, Himanshu
- Publisher
- Springer
- Publication year
- 2013
- Condition
- New
- Binding
- Soft cover
- Language
- English
- ISBN 10
- 1475776292
- ISBN 13
- 9781475776294
- Item weight
- 626 grams
The emphasis of this book is on real-time application of Synopsys tools, used to combat various problems seen at VDSM geometries. Readers will be exposed to an effective design methodology for handling complex, sub-micron ASIC designs. Significance is placed on HDL coding styles, synthesis and optimization, dynamic simulation, formal verification, DFT scan insertion, links to layout, physical synthesis, and static timing analysis. At each step, problems related to each phase of the design flow are identified, with solutions and work-around described in detail. In addition, crucial issues related to layout, which includes clock tree synthesis and back-end integration (links to layout) are also discussed at length. Furthermore, the book contains in-depth discussions on the basis of Synopsys technology libraries and HDL coding styles, targeted towards optimal synthesis solution.
Target audiences for this book are practicing ASIC design engineers and masters level students undertaking advanced VLSI courses on ASIC chip design and DFT techniques.
"Synopsis" may belong to another edition of this title.
Ria Christie Collections
Uxbridge, United Kingdom
AbeBooks seller since March 25, 2015
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