Advanced Digital Logic Design Using VHDL, State Machines, and Synthesis for FPGA's

This textbook is intended to serve as a practical guide for the design of complex digital logic circuits such as digital control circuits, network interface circuits, pipelined arithmetic units, and RISC microprocessors. It is an advanced digital logic design textbook that emphasizes the use of synthesizable VHDL code and provides numerous fully worked-out practical design examples including a Universal Serial Bus interface, a pipelined multiply-accumulate unit, and a pipelined microprocessor for the ARM THUMB architecture.

Sunggu Lee received the B.S.E.E. degree with highest distinction from the University of Kansas, Lawrence, in 1985 and the M.S.E. and Ph.D. degrees from the University of Michigan, Ann Arbor, in 1987 and 1990, respectively. He is currently an Associate Professor in the Department of Electronic and Electrical Engineering at the Pohang University of Science and Technology (POSTECH), Pohang, Korea. Prior to this appointment, he was an Assistant Professor in the Department of Electrical Engineering at the University of Delaware in Newark, Delaware, U.S.A. From June 1997 to June 1998, he spent one year as a Visiting Scientist at the IBM T. J. Watson Research Center. His research interests are in parallel computing using clusters, fault-tolerant computing, and real-time computing.