Analysis & Implementation of FlipFlop Grouping with Clock Gating

Language: English

Published by LAP LAMBERT Academic Publishing Jun 2020, 2020

6200265682 / 9786200265685

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Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermanyBuchWeltWeit Ludwig Meier e.K.

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This item is printed on demand - it takes 3-4 days longer - Neuware -The memory circuit has sequential elements as flip-flops, registers which are being used for storing and transferring data. The memory stores the data with the help of the clock signal in the flip-flops. The flip-flops are the edge triggered device which can be enabled either by a positive or negative clock cycle, so the complementary cycle either the negative or positive will be left without processing which creates a need for large number of clock pulse which in turn increases the power consumption. Thus flip- flops are proposed to act on both the clock cycles. The flip-flops are 1-bit element so they are grouped together to store multiple bits based on the flip-flop grouping technique which reduces the number of clock pulse. The Clock Gating technique overcomes the power consumption occurring when the system is active on unnecessary period of time by tuning the system into ideal mode. 88 pp. Englisch.

Seller Inventory # 9786200265685

Title
Analysis & Implementation of FlipFlop Grouping with Clock Gating
Author
Arthi Rangaraj
Publisher
LAP LAMBERT Academic Publishing Jun 2020
Publication year
2020
Condition
Neu
Binding
Taschenbuch
Language
English
ISBN 10
6200265682
ISBN 13
9786200265685
Item weight
149 grams
Dimensions
220x150x6 mm

BuchWeltWeit Ludwig Meier e.K.

Bergisch Gladbach, Germany

5-star seller

AbeBooks seller since January 11, 2012

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BuchWeltWeit Ludwig Meier e.K.

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