Area Array Interconnection Handbook

Paul A. Totta

ISBN 10: 146135529X / ISBN 13: 9781461355298

Published by Springer US, Chapman And Hall/CRC Nov 2012, 2012

About this Item

This item is printed on demand - Print on Demand Titel. Neuware -Microelectronic packaging has been recognized as an important 'enabler' for the solid state revolution in electronics which we have witnessed in the last third of the twentieth century. Packaging has provided the necessary external wiring and interconnection capability for transistors and integrated circuits while they have gone through their own spectacular revolution from discrete device to gigascale integration. At IBM we are proud to have created the initial, simple concept of flip chip with solder bump connections at a time when a better way was needed to boost the reliability and improve the manufacturability of semiconductors. The basic design which was chosen for SLT (Solid Logic Technology) in the 1960s was easily extended to integrated circuits in the '70s and VLSI in the '80s and '90s. Three I/O bumps have grown to 3000 with even more anticipated for the future. The package families have evolved from thick-film (SLT) to thin-film (metallized ceramic) to co-fired multi-layer ceramic. A later family or ceramics with matching expansivity to sili con and copper internal wiring was developed as a predecessor of the chip interconnection revolution in copper, multilevel, submicron wiring. Powerful server packages have been de veloped in which the combined chip and package copper wiring exceeds a kilometer. All of this was achieved with the constant objective of minimizing circuit delays through short, efficient interconnects.Springer-Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 1332 pp. Englisch.

Seller Inventory # 9781461355298

Bibliographic Details

• Title: Area Array Interconnection Handbook
• Publisher: Springer US, Chapman And Hall/CRC Nov 2012
• Publication Date: 2012
• Language: English
• ISBN 10: 146135529X
• ISBN 13: 9781461355298
• Binding: Taschenbuch
• Condition: Neu
• Dimensions: 254W x 178H x 72D millimeters 254 millimeters width by 178 millimeters height by 72 millimeters depth
• Weight: 2464 grams

About this title

Synopsis

Microelectronic packaging has been recognized as an important "enabler" for the solid­ state revolution in electronics which we have witnessed in the last third of the twentieth century. Packaging has provided the necessary external wiring and interconnection capability for transistors and integrated circuits while they have gone through their own spectacular revolution from discrete device to gigascale integration. At IBM we are proud to have created the initial, simple concept of flip chip with solder bump connections at a time when a better way was needed to boost the reliability and improve the manufacturability of semiconductors. The basic design which was chosen for SLT (Solid Logic Technology) in the 1960s was easily extended to integrated circuits in the '70s and VLSI in the '80s and '90s. Three I/O bumps have grown to 3000 with even more anticipated for the future. The package families have evolved from thick-film (SLT) to thin-film (metallized ceramic) to co-fired multi-layer ceramic. A later family or ceramics with matching expansivity to sili­ con and copper internal wiring was developed as a predecessor of the chip interconnection revolution in copper, multilevel, submicron wiring. Powerful server packages have been de­ veloped in which the combined chip and package copper wiring exceeds a kilometer. All of this was achieved with the constant objective of minimizing circuit delays through short, efficient interconnects.