CMOS SRAM Design and analysis of low leakage and high speed SRAM cell

Language: English

Published by LAP LAMBERT Academic Publishing Apr 2016, 2016

3659861111 / 9783659861116

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Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermanyBuchWeltWeit Ludwig Meier e.K.

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This item is printed on demand - it takes 3-4 days longer - Neuware -In this work The novel single ended 5T and 6T SRAM cell is presented. This transistor is high density cell or takes less area than conventional 6T SRAM cell. Leakage current of this cell is very low as compared to other 5T or conventional 6T cell. There is a requirement of precharge circuit for this cell as that in conventional 6T SRAM cell. This cell is also power efficient. Also results show that the data stored in this cell is highly stable.There is always scope of improvement in any type of circuit or application. With the proposed configuration we can improve it with various techniques. We can change aspect ratio of the cell for better results. We can apply clock gating for power efficient circuit. We can improve peripheral circuit for better performance. 108 pp. Englisch.

Seller Inventory # 9783659861116

Title
CMOS SRAM Design and analysis of low leakage and high speed SRAM cell
Author
Rohin Gupta
Publisher
LAP LAMBERT Academic Publishing Apr 2016
Publication year
2016
Condition
Neu
Binding
Taschenbuch
Language
English
ISBN 10
3659861111
ISBN 13
9783659861116
Item weight
179 grams
Dimensions
220x150x7 mm

BuchWeltWeit Ludwig Meier e.K.

Bergisch Gladbach, Germany

5-star seller

AbeBooks seller since January 11, 2012

Shipping rates from Germany to U.S.A.

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BuchWeltWeit Ludwig Meier e.K.

Germany