CMOS Sram Circuit Design and Parametric Test in Nano-Scaled Technologies : Process-Aware Sram Design and Test

Andrei Pavlov

ISBN 10: 1402083629 / ISBN 13: 9781402083624

Published by Springer Jun 2008, 2008

About this Item

Neuware - CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies covers a broad range of topics related to SRAM design and test. From SRAM operation basics through cell electrical and physical design to process-aware and economical approach to SRAM testing. The emphasis of the book is on challenges and solutions of stability testing as well as on development of understanding of the link between the process technology and SRAM circuit design in modern nano-scaled technologies.

Seller Inventory # 9781402083624

Bibliographic Details

• Title: CMOS Sram Circuit Design and Parametric Test in Nano-Scaled Technologies : Process-Aware Sram Design and Test
• Publisher: Springer Jun 2008
• Publication Date: 2008
• Language: English
• ISBN 10: 1402083629
• ISBN 13: 9781402083624
• Binding: Buch
• Condition: Neu
• Dimensions: 242W x 166H x 19D millimeters 242 millimeters width by 166 millimeters height by 19 millimeters depth
• Weight: 445 grams

About this title

Synopsis

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies covers a broad range of topics related to SRAM design and test. From SRAM operation basics through cell electrical and physical design to process-aware and economical approach to SRAM testing. The emphasis of the book is on challenges and solutions of stability testing as well as on development of understanding of the link between the process technology and SRAM circuit design in modern nano-scaled technologies.

About the Author

Prof. Sachdev has authored several successful books with Springer