CUDA and GPU Parallel Computing Engineering (Paperback)
Language: English
Published by Independently Published, 2026
- Softcover
- New

Seller: Grand Eagle Retail, Bensenville, IL, U.S.A.Grand Eagle Retail
AbeBooks seller since October 12, 2005
Condition: New
US$ 22.99
Quantity: 1 available
Add to basketItem description from seller
Paperback. A practical guide to high-performance CUDA development for engineers, researchers, and developers who need more than introductory examples. This book focuses on the full workflow of GPU computing, from understanding how streaming multiprocessors execute warps to building maintainable, testable, and scalable applications for real scientific workloads.The chapters move from core architecture and programming fundamentals into profiling, memory tuning, numerical accuracy, and multi-GPU scaling. You will see how to turn a correct kernel into an efficient one, how to measure bottlenecks with Nsight tools, and how to make informed tradeoffs between occupancy, bandwidth, latency, and precision.What this book coversGPU architecture and execution behavior, including warps, scheduling, memory hierarchy, and data movement costs.CUDA kernel design, with launch configuration, indexing, synchronization, debugging, and reusable interfaces.Performance engineering, using profiling metrics and iterative optimization based on measured results.Memory optimization, including coalescing, shared memory tiling, register pressure, cache behavior, and data layout.Common scientific patterns, such as stencils, reductions, scans, sparse formats, and batched linear algebra.Numerical correctness, with floating point behavior, stable summation, boundary handling, and CPU validation.Advanced coordination techniques, such as warp and block level operations, streams, events, and asynchronous overlap.Host and multi-GPU engineering, covering pinned memory, unified memory, partitioning strategies, NCCL, halo exchange, and scaling studies.Why it stands outEngineering-first approach, centered on real optimization decisions rather than isolated syntax.Workflow oriented, with profiling, testing, benchmarking, and regression tracking built into the discussion.Useful for scientific computing, especially stencil solvers, sparse methods, reductions, and iterative pipelines.Built for maintainability, with guidance on project structure, code reuse, and repeatable validation.Ideal for anyone who wants to write CUDA code that is not only correct, but also fast, traceable, and ready for production-scale workloads. This item is printed on demand. Shipping may be from multiple locations in the US or from the UK, depending on stock availability.…
Seller Inventory # 9798196510748
- Title
- CUDA and GPU Parallel Computing Engineering (Paperback)
- Author
- Eamon Virek
- Publisher
- Independently Published
- Publication year
- 2026
- Condition
- new
- Binding
- Paperback
- Language
- English
- ISBN 13
- 9798196510748
A practical guide to high-performance CUDA development for engineers, researchers, and developers who need more than introductory examples. This book focuses on the full workflow of GPU computing, from understanding how streaming multiprocessors execute warps to building maintainable, testable, and scalable applications for real scientific workloads.
The chapters move from core architecture and programming fundamentals into profiling, memory tuning, numerical accuracy, and multi-GPU scaling. You will see how to turn a correct kernel into an efficient one, how to measure bottlenecks with Nsight tools, and how to make informed tradeoffs between occupancy, bandwidth, latency, and precision.
What this book covers
- GPU architecture and execution behavior, including warps, scheduling, memory hierarchy, and data movement costs.
- CUDA kernel design, with launch configuration, indexing, synchronization, debugging, and reusable interfaces.
- Performance engineering, using profiling metrics and iterative optimization based on measured results.
- Memory optimization, including coalescing, shared memory tiling, register pressure, cache behavior, and data layout.
- Common scientific patterns, such as stencils, reductions, scans, sparse formats, and batched linear algebra.
- Numerical correctness, with floating point behavior, stable summation, boundary handling, and CPU validation.
- Advanced coordination techniques, such as warp and block level operations, streams, events, and asynchronous overlap.
- Host and multi-GPU engineering, covering pinned memory, unified memory, partitioning strategies, NCCL, halo exchange, and scaling studies.
Why it stands out
- Engineering-first approach, centered on real optimization decisions rather than isolated syntax.
- Workflow oriented, with profiling, testing, benchmarking, and regression tracking built into the discussion.
- Useful for scientific computing, especially stencil solvers, sparse methods, reductions, and iterative pipelines.
- Built for maintainability, with guidance on project structure, code reuse, and repeatable validation.
Ideal for anyone who wants to write CUDA code that is not only correct, but also fast, traceable, and ready for production-scale workloads.
"Synopsis" may belong to another edition of this title.
Grand Eagle Retail
Bensenville, IL, U.S.A.
AbeBooks seller since October 12, 2005
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