Abstract of CLASS-4 ACTIVE TWO-WAY RFID TAG:- UHF Radio Frequency Identification (RFID) is a promising technology that has experienced tremendous growth by revolutionizing a variety of industry sectors and applications. Despite its wide use, the ability to track an object when the tag goes out of tracking/read range has been a major drawback. This thesis proposes a design of an analog front-end architecture and the baseband controller for a novel class-4 active two-way (C4-ATW) RFID tag to maximize/increase the tracking range by using a tag hopping technique. The tag hopping technique enables C4-ATW RFID tags to power their own communication with other C4-ATW or passive RFID tags to maximize the read range while the reader’s functionality remains unchanged. Simulation results using 90 nm 1P9M CMOS process parameters indicate that a C4-ATW RFID tag can operate at a minimum input power of -20 dBm at a 120 kbps data rate; the achieved read range between reader to tag is 36.7 m at 4 W reader power, and tag-to-tag is 2.2 m at 25 mW of tag power. Combined, the analog front end and baseband controller consume 50.3 mW of power and the area of the chip, including pads, is 854 �m x 542 �m

About the Author

He received his BE degree from University of Karnataka, India in 1999, and his MS degree from San Jose State University, USA in 2010. He is a senior member of VDSL Group, Ikanos Communications, CA working on analog/mixed-signal design, silicon validation and productization of CO & CPE products. His research focused on analog, RFIC & embedded system

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