C Compilers for ASIPs
Hohenauer, Manuel; Leupers, Rainer
Sold by Kennys Bookshop and Art Galleries Ltd., Galway, GY, Ireland
AbeBooks Seller since February 27, 2001
New - Hardcover
Condition: New
Quantity: 15 available
Add to basketSold by Kennys Bookshop and Art Galleries Ltd., Galway, GY, Ireland
AbeBooks Seller since February 27, 2001
Condition: New
Quantity: 15 available
Add to basketThis book presents a novel approach for Architecture Description Language (ADL)-based instruction-set description that enables the automatic retargeting of the complete software toolkit from a single ADL processor model. Num Pages: 223 pages, 9 black & white tables, biography. BIC Classification: TJFC. Category: (P) Professional & Vocational. Dimension: 234 x 156 x 14. Weight in Grams: 1140. . 2009. Hardback. . . . .
Seller Inventory # V9781441911759
C Compilers for ASIPs: Automatic Compiler Generation with LISA
by:
Manuel Hohenauer
Rainer Leupers
The ever increasing complexity and performance requirements of modern electronic devices are changing the way embedded systems are designed and implemented today. The current trend is towards programmable System-on-Chip platforms which employ an increasing number of Application Specific Instruction-set Processors (ASIPs) as building blocks. ASIP design platforms comprise retargetable software development tools that can be adapted quickly to varying target processor configurations. Such tools are usually driven by a processor model given in an Architecture Description Language (ADL), such as LISA. One of the major challenges in this context is retargetable compilation for high-level programming languages like C. First of all, an ADL must capture the architectural information needed for the tool generation in an unambiguous and consistent way. This is particularly difficult for compiler and instruction-set simulator. Moreover, there exists a trade-off between the compiler's flexibility and the quality of compiled code.
This book presents a novel approach for ADL-based instruction-set description in order to enable the automatic retargeting of the complete software toolkit from a single ADL processor model. Additionally, this book includes retargetable optimization techniques for architectures with SIMD and Predicated Execution support. Both allows a high speedup in compiler generation and combines high flexibility with acceptable code quality at the same time. Coverage includes a comprehensive overview of retargetable compilers and ADL based processor design, a methodology and related toolkit to generate a C-compiler fully automatically from an ADL processor model, and retargetable code optimization techniques.
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