Computer Architecture Tutorial Using an FPGA: ARM & Verilog Introductions

Dunne, Robert

ISBN 10: 0970112475 / ISBN 13: 9780970112477

Published by Gaul Communications, 2020

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Bibliographic Details

• Title: Computer Architecture Tutorial Using an FPGA: ARM & Verilog Introductions
• Publisher: Gaul Communications
• Publication Date: 2020
• Language: English
• ISBN 10: 0970112475
• ISBN 13: 9780970112477
• Binding: Hardcover
• Condition: New

About this title

Synopsis

Learn computer architecture and get practical "hands on" experience using an FPGA while studying at home. A working model of a 32-bit ARM processor is gradually built from basic principles of computer architecture. Field Programmable Gate Arrays (FPGA) provide flexible digital electronics platforms that can be organized as a CPU, a neural net, or almost any other digital circuit. They are the digital equivalent of shape-shifters in science fiction.

The FPGA is first introduced graphically through operational models of individual logic gates and structures like buses and decoders. Next, the Verilog coding begins with simple circuit examples and culminates with a CPU that runs ARM machine code. Programs can even be entered in symbolic assembly language which is compiled into 100% ARM machine code by macros, tasks, and functions written in the Verilog language. This CPU imitation can be run at full speed, stepped through with breakpoints, or paused within the fetch, decode, and execute cycle.

Over 150 illustrations accompany detailed descriptions for setting up the FPGA and walking through each of the nearly 100 Verilog examples. All source code examples can be downloaded from GitHub and use the Intel(R) Quartus(R) Prime software along with a Terasic DE10-Lite FPGA development board. The DE10-Lite is available for purchase for less than $180 at many Internet sites, and the Intel(R) Quartus(R) Prime Lite Edition is available as a free download from Intel. Other FPGA boards and other Verilog software can be used, but slight modifications to the examples may be necessary.