Computer Architectures for Spatially Distributed Data

. Ed(s): Freeman, Herbert; Pieroni, G. G.

ISBN 10: 3642821529 / ISBN 13: 9783642821523

Published by Springer-Verlag Berlin and Heidelberg GmbH & Co. KG, 2011

About this Item

Proceedings of the NATO Advanced Study Institute on Computer Architectures for Spatially Distributed Data Held at Cetraro (Cosenza), Italy, 6 - 17 June 1983 Editor(s): Freeman, Herbert; Pieroni, G. G. Series: NATO Asi Series / NATO Asi Subseries F:. Num Pages: 391 pages, biography. BIC Classification: UKS; UT; UYF. Category: (P) Professional & Vocational. Dimension: 244 x 170 x 21. Weight in Grams: 693. . 2011. Softcover reprint of the original 1st ed. 1985. Paperback. . . . .

Seller Inventory # V9783642821523

Bibliographic Details

• Title: Computer Architectures for Spatially Distributed Data
• Publisher: Springer-Verlag Berlin and Heidelberg GmbH & Co. KG
• Publication Date: 2011
• Language: English
• ISBN 10: 3642821529
• ISBN 13: 9783642821523
• Binding: Soft cover
• Condition: New

About this title

Synopsis

These are the proceedings of a NATO Advanced Study Institute (ASI) held in Cetraro, Italy during 6-17 June 1983. The title of the ASI was Computer Arehiteetures for SpatiaZZy vistributed Vata, and it brouqht together some 60 participants from Europe and America. Presented ~ere are 21 of the lectures that were delivered. The articles cover a wide spectrum of topics related to computer architecture s specially oriented toward the fast processing of spatial data, and represent an excellent review of the state-of-the-art of this topic. For more than 20 years now researchers in pattern recognition, image processing, meteorology, remote sensing, and computer engineering have been looking toward new forms of computer architectures to speed the processing of data from two- and three-dimensional processes. The work can be said to have commenced with the landmark article by Steve Unger in 1958, and it received a strong forward push with the development of the ILIAC III and IV computers at the University of Illinois during the 1960's. One clear obstacle faced by the computer designers in those days was the limitation of the state-of-the-art of hardware, when the only switching devices available to them were discrete transistors. As aresult parallel processing was generally considered to be imprae­ tieal, and relatively little progress was made.