Cryptosystem execution of VLSI signed RNS multipliers

Debasis Mukherjee

ISBN 10: 6206173364 / ISBN 13: 9786206173366

Published by LAP LAMBERT Academic Publishing, 2023

About this Item

nach der Bestellung gedruckt Neuware - Printed after ordering - This book explores the VLSI implementation of signed Residue Number System (RNS) multipliers for efficient and secure cryptographic operations. It covers topics such as the background, objectives, and motivations for the research. The book provides an overview of VLSI implementation for cryptosystems, delves into the properties and advantages of RNS, and discusses moduli selection techniques. It explores conversion techniques for signed numbers to RNS representation and highlights the importance of efficient multiplication in cryptosystems. The book compares different multiplication techniques and analyzes their performance. It discusses VLSI design techniques for signed RNS multipliers, including parallelism, hardware acceleration, and error detection. The trade-offs between speed, resource utilization, and power consumption are examined. The book presents case studies, comparative analysis, and real-world applications of signed RNS multipliers. It discusses performance metrics, evaluation techniques, and future directions in VLSI technology for cryptographic systems. The book concludes by summarizing key findings and contributions.

Seller Inventory # 9786206173366

Bibliographic Details

• Title: Cryptosystem execution of VLSI signed RNS multipliers
• Publisher: LAP LAMBERT Academic Publishing
• Publication Date: 2023
• Language: English
• ISBN 10: 6206173364
• ISBN 13: 9786206173366
• Binding: Taschenbuch
• Condition: Neu
• Dimensions: 220W x 150H x 6D millimeters 220 millimeters width by 150 millimeters height by 6 millimeters depth
• Weight: 161 grams

About this title

Synopsis

This book explores the VLSI implementation of signed Residue Number System (RNS) multipliers for efficient and secure cryptographic operations. It covers topics such as the background, objectives, and motivations for the research. The book provides an overview of VLSI implementation for cryptosystems, delves into the properties and advantages of RNS, and discusses moduli selection techniques. It explores conversion techniques for signed numbers to RNS representation and highlights the importance of efficient multiplication in cryptosystems. The book compares different multiplication techniques and analyzes their performance. It discusses VLSI design techniques for signed RNS multipliers, including parallelism, hardware acceleration, and error detection. The trade-offs between speed, resource utilization, and power consumption are examined. The book presents case studies, comparative analysis, and real-world applications of signed RNS multipliers. It discusses performance metrics, evaluation techniques, and future directions in VLSI technology for cryptographic systems. The book concludes by summarizing key findings and contributions.