Defect and Fault Tolerance in VLSI Systems: Volume 2

Stapper, C.H. (Editor) / Jain, V.K. (Editor) / Saucier, Gabriele (Editor)

ISBN 10: 1475799594 / ISBN 13: 9781475799590

Published by Springer, 2013

About this Item

reprint edition. 329 pages. 10.00x7.01x0.75 inches. In Stock.

Seller Inventory # x-1475799594

Bibliographic Details

• Title: Defect and Fault Tolerance in VLSI Systems: Volume 2
• Publisher: Springer
• Publication Date: 2013
• Language: English
• ISBN 10: 1475799594
• ISBN 13: 9781475799590
• Binding: Paperback
• Condition: Brand New
• Weight: 0.58 kilograms

About this title

Synopsis

Higher circuit densities, increasingly more complex application ohjectives, and advanced packaging technologies have suhstantially increased the need to incorporate defect-tolerance and fault-tolerance in the design of VLSI and WSI systems. The goals of defect-tolerance and fault-tolerance are yield enhancement and improved reliahility. The emphasis on this area has resulted in a new field of interdisciplinary scientific research. I n fact, advanced methods of defect/fault control and tolerance are resulting in enhanced manufacturahility and productivity of integrated circuit chips, VI.SI systems, and wafer scale integrated circuits. In 1987, Dr. W. Moore organized an "International Workshop on Designing for Yield" at Oxford University. Edited papers of that workshop were published in reference [II. The participants in that workshop agreed that meetings of this type should he con­ tinued. preferahly on a yearly hasis. It was Dr. I. Koren who organized the "IEEE Inter national Workshop on Defect and Fault Tolerance in VLSI Systems" in Springfield Massachusetts the next year. Selected papers from that workshop were puhlished as the first volume of this series [21.