The Definitive Guide to ARM® Cortex®-M0 and Cortex-M0+ Processors

Joseph Yiu

ISBN 10: 0128032774 / ISBN 13: 9780128032770

Published by Newnes, 2015

About this Item

The Definitive Guide to ARM® Cortex®-M0 and Cortex-M0+ Processors | Joseph Yiu | Taschenbuch | Einband - flex.(Paperback) | Englisch | 2015 | Newnes | EAN 9780128032770 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.

Seller Inventory # 104662427

Bibliographic Details

• Title: The Definitive Guide to ARM® Cortex®-M0 and Cortex-M0+ Processors
• Publisher: Newnes
• Publication Date: 2015
• Language: English
• ISBN 10: 0128032774
• ISBN 13: 9780128032770
• Binding: Taschenbuch
• Edition: 2nd Edition
• Condition: Neu
• Dimensions: 36W x 186H x 232D millimeters 36 millimeters width by 186 millimeters height by 232 millimeters depth
• Weight: 1560 grams
• Seller catalogs:
  • Bücher

About this title

Synopsis

The Definitive Guide to the ARM Cortex -M0 and Cortex-M0+ Processors, Second Edition explains the architectures underneath ARM’s Cortex-M0 and Cortex-M0+ processors and their programming techniques.

Written by ARM’s Senior Embedded Technology Manager, Joseph Yiu, the book is packed with examples on how to use the features in the Cortex-M0 and Cortex-M0+ processors. It provides detailed information on the instruction set architecture, how to use a number of popular development suites, an overview of the software development flow, and information on how to locate problems in the program code and software porting.

This new edition includes the differences between the Cortex-M0 and Cortex-M0+ processors such as architectural features (e.g. unprivileged execution level, vector table relocation), new chapters on low power designs and the Memory Protection Unit (MPU), the benefits of the Cortex-M0+ processor, such as the new single cycle I/O interface, higher energy efficiency, better performance and the Micro Trace Buffer (MTB) feature, updated software development tools, updated Real Time Operating System examples using Keil RTX with CMSIS-RTOS APIs, examples of using various Cortex-M0 and Cortex-M0+ based microcontrollers, and much more.

• Provides detailed information on ARM Cortex -M0 and Cortex-M0+ Processors, including their architectures, programming model, instruction set, and interrupt handling
• Presents detailed information on the differences between the Cortex-M0 and Cortex-M0+ processors
• Covers software development flow, including examples for various development tools in both C and assembly languages
• Includes in-depth coverage of design approaches and considerations for developing ultra low power embedded systems, the benchmark for energy efficiency in microcontrollers, and examples of utilizing low power features in microcontrollers

About the Author

Joseph Yiu joined Arm in 2001 and has been involved in a wide range of projects including development of Arm Cortex-M processors and various on-chip system level and debug components. In addition to in-depth knowledge of the processors and microcontroller system design, Joseph also has extensive knowledge in related areas including software development for the Arm Cortex-M microcontrollers, FPGA development and System-on-Chip design technologies.