Design and Analysis of 2

Multiplexers, adders and multipliers are the most fundamental arithmetic component of the processor. These three have a direct impact on power consumption and speed of VLSI systems. Therefore study on low-power and high speed multiplexers, adders and multipliers is inevitable. Two important attributes of all digital circuits, for most applications are maximizing speed and minimizing power consumption. In this write up, i delve into various techniques for designing of 2:1 Multiplexer. The proposed design shows remarkably reduced power consumption and improved temperature sustainability when compared with the existing 2:1 multiplexer. The application of proposed 2:1 multiplexer circuit is shown in one-bit full adder cell and 2x2 array multiplier circuit, which also shows less power consumption and improved temperature sustainability over a range of parameters when compared with the existing one-bit full adder cell and existing 2x2 array multiplier.

Ila Gupta received the B.Sc.and M.Sc.degree in Physics from Dr RML Avadh University,Faizabad(U.P)INDIA in 2005,2008 respectively. She has completed the academics of M.Tech.in VLSI design from FET,MITS,Rajasthan in 2012.She is working as a Assistant Professor in Maa Buddha National Institute of Engineering & Technology, Nizambad, Azamgarh(U.P)INDIA.