Design of High-Performance CMOS Voltage-Controlled Oscillators

Language: English

Published by Springer, Springer, 2012

1461354145 / 9781461354147

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Druck auf Anfrage Neuware - Printed after ordering - Design of High-Performance CMOS Voltage-Controlled Oscillators presents a phase noise modeling framework for CMOS ring oscillators. The analysis considers both linear and nonlinear operation. It indicates that fast rail-to-rail switching has to be achieved to minimize phase noise. Additionally, in conventional design the flicker noise in the bias circuit can potentially dominate the phase noise at low offset frequencies. Therefore, for narrow bandwidth PLLs, noise up conversion for the bias circuits should be minimized. We define the effective Q factor (Qeff) for ring oscillators and predict its increase for CMOS processes with smaller feature sizes. Our phase noise analysis is validated via simulation and measurement results.The digital switching noise coupled through the power supply and substrate is usually the dominant source of clock jitter. Improving the supply and substrate noise immunity of a PLL is a challenging job in hostile environments such as a microprocessor chip where millions of digital gates are present.

Seller Inventory # 9781461354147

Title
Design of High-Performance CMOS Voltage-Controlled Oscillators
Author
Liang Dai
Publisher
Springer, Springer
Publication year
2012
Condition
Neu
Binding
Taschenbuch
Language
English
ISBN 10
1461354145
ISBN 13
9781461354147
Item weight
289 grams
Dimensions
235x155x11 mm

AHA-BUCH GmbH

Einbeck, Germany

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