Design of Low Leakage High Temperature Digital Cell Libraries: A Leakage Reduction Approach Using Stacked Transistors

In today's world of semiconductors, the demand for reliable and power efficient high temperature electronic circuits that operate at temperatures in excess of 200C has been increasing. High temperature electronics find application in automotive, aviation and down-hole oil well drilling and monitoring circuits. Leakage currents are very high in such harsh environments and limit the operating range of these circuits. A novel approach of reducing leakage currents by using stacked transistors has been proposed in this book. As design complexity has been increasing day by day, laying out the circuits by hand is cumbersome and time-consuming process. Hence a custom ASIC cell library approach is preferred to reduce design time and shorten the time to market. This book analyses the advantages of SOI technology at high temperatures, the various leakage mechanisms and the stacked transistor approach to leakage reduction and also presents an overview of cell library design guidelines and timing characterization models. The book will be of interest to researchers and circuit designers in the area of high temperature electronics looking to build robust and power-efficient circuits.

Singaravelan Viswanathan: Master's in Electrical Engg. from Oklahoma State University, Stillwater.Design Engineer at Intel Corporation, Hillsboro, Oregon.Dr.Chris Hutchens: Ph.D in Electrical Engg. from University of Missouri, Columbia. Associate professor at School of Electrical & Computer Engineering at Oklahoma State University, Stillwater