Design for Manufacturability and Yield for Nano-Scale CMOS

Manufacturability and yield are no longer a fabrication, packaging, and test concerns. They are aspects that have to be designed in, and they are everybody’s responsibility. Design for Manufacturability and Yield for Nano-Scale CMOS walks the reader through all the aspects of manufacturability and yield in a nano-CMOS process and how to address each aspect at the proper design step starting with the layout of standard cells and how to yield-grade libraries for critical area and lithography artifacts through place and route, CMP model based simulation and dummy-fill insertion, and through statistical timing closure of the design. It alerts the designer to the pitfalls to watch for and to the good practices that can enhance a design’s manufacturability and yield. A must read book for the serious designer.