A Designer's Guide to VHDL Synthesis
Language: English
Published by Kluwer Academic, 1994
- Hardcover
- New
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- Title
- A Designer's Guide to VHDL Synthesis
- Author
- Ott, Douglas E.; Wilderotter, Thomas J.
- Publisher
- Kluwer Academic
- Publication year
- 1994
- Condition
- New
- Binding
- Hardcover
- Language
- English
- ISBN 10
- 0792394720
- ISBN 13
- 9780792394723
VHDL and logic synthesis tools provide very powerful capabilities for ASIC design, but are also very complex and represent a radical departure from traditional design methods. This situation has made it difficult to get started in using this technology for both designers and management, since a major learning effort and `culture' change is required. A Designer's Guide to VHDL Synthesis has been written to help design engineers and other professionals successfully make the transition to a design methodology based on VHDL and log synthesis instead of the more traditional schematic based approach. While there are a number of texts on the VHDL language and its use in simulation, little has been written from a designer's viewpoint on how to use VHDL and logic synthesis to design real ASIC systems. The material in this book is based on experience gained in successfully using these techniques for ASIC design and relies heavily on realistic examples to demonstrate the principles involved.
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