The book presents the basic tools for the design of digital circuits and provides procedures suitable for a variety of digital applications. The easy to use Verilog HDL simulator CD-ROM—Packaged with every book--provides users with an all-in-one environment to learn, write, and test their designs without a lot of overhead. Update includes nine sections on Verilog Hardware Description Language (HDL); Material on combinational circuits is reorganized—now covered in one chapter instead of two; New emphasis in the sequential circuits chapters on design with D flip-flops instead of JK and SR flip-flops; Combined material on memory and programmable logic; Digital design in the Register Transfer Level (RTL) is mostly new. Suitable for a variety of digital applications in Electrical Engineering, Computer Engineering, or Computer Science fields.
This is a modern revision of the classic digital design textbook. The book teaches the basic tools for the design of digital circuits in a clear, easily accessible manner. New to This Edition:
- Nine sections on Verilog Hardware Description Language (HDL) inserted in discrete sections, allowing the material to be covered or skipped as desired. The Verilog HDL presentation is at a suitable level for beginning students who are learning digital circuits for the first time.
- Reorganized material on combinational circuits is now covered in a single chapter.
- The emphasis in the sequential circuits chapters is now on design with D flip-flops instead of JK and SR flip-flops.
- The material on memory and programmable logic is now consolidated in one chapter.
- Chapter 8 consists mostly of new material and now covers digital design in the Register Transfer Level (P) FL), preparing the reader for more advanced design projects and further Verilog HDL studies.
- A new section in Chapter 11 supplements the laboratory experiments with HDL experiments. These unable the reader to check the circuits designed in the laboratory by means of hardware components and/or by HDL simulation.
- Text accompanied by Verilog simulator software—SynaptiCAD's VeriLogger Pro evaluation version, a Verilog simulation environment that combines all of the features of a traditional Verilog simulator with a powerful graphical test vector generator. Fast model testing in VeriLogger Pro allows the reader to perform bottom-up testing of every model in a design. All of the HDL examples in the book can be found on the CD-ROM.
- A Companion Website includes resources for instructors and students such as transparency masters of all figures in the book, all HDL code examples from the book, a Verilog tutorial, tutorials on using the VeriLogger Pro software, and more.
