Digital Multiplier Design with different algorithms: Simulation and Analysis

Ravi Kumar, Korra/ Sadanandam, Mittapally/ Raju, Manda

ISBN 10: 6200086184 / ISBN 13: 9786200086181

Published by LAP LAMBERT Academic Publishing, 2019

About this Item

88 pages. 8.66x5.91x0.20 inches. In Stock.

Seller Inventory # zk6200086184

Bibliographic Details

• Title: Digital Multiplier Design with different algorithms: Simulation and Analysis
• Publisher: LAP LAMBERT Academic Publishing
• Publication Date: 2019
• Language: English
• ISBN 10: 6200086184
• ISBN 13: 9786200086181
• Binding: Paperback
• Condition: Brand New
• Weight: 0.18 kilograms

About this title

Synopsis

Multipliers play an important role in today’s digital signal processing and various other applications. In high performance systems such as microprocessor, DSP etc addition and multiplication of two binary numbers is fundamental and most often used arithmetic operations. Statics shows that more than 70% instructions in microprocessor and most of DSP algorithms perform addition and multiplication. So, these operations dominate the execution time. That’s why; there is need of high speed multiplier. The demand of high speed processing has been increasing as a result of expanding computer and signal processing applications. Low power consumption is also an important issue in multiplier design. To reduce significant power consumption it is good to reduce the number of operation thereby reducing dynamic power which is a major part of total power consumption. So the need of high speed and low power multiplier has increased. Designer mainly concentrates on high speed and low power efficient circuit design. The objective of a good multiplier is to provide a physically packed together, high speed and low power consumption unit.